Allocated local errors meet the global budget

Suppose $L\ge 1$ stage compilers called by Allocate local error budgets through a pipeline return implemented channels with local normalized diamond errors at most $\epsilon \mathrm{/}L$ and, for every successful history reaching stage $j$, conditional failure probability at most $\delta \mathrm{/}L$. Then the final channel error is at most $\epsilon$ and the probability of any stage failure is at most $\delta$. Use the finite execution-history model of End-to-end channel and output error contract. No independence between stage failures is assumed.

For resource composition, let $c_j$ be each stage's actual cost record and let $c_{\mathrm{a}\mathrm{u}\mathrm{x}}$ record, exactly once, shared input/preprocessing, allocator arithmetic, and every interstage wiring/control, postprocessing, and final-output operation not already included in a $c_j$. For each additive count, length, or sequential-time coordinate $r$ of Classical output, quantum-state output, and access costs and Circuit-family and computation cost model—including input/circuit-description length, preprocessing and sequential compiler time, each named data-structure or oracle operation, state-preparation and its controlled/inverse calls, gate occurrences by type, measurements, classical predicate/postprocessing, and output-bit writes—assume the pipeline performs precisely the operations in these records and has no unrecorded work. Then its total is $c_{\mathrm{t}\mathrm{o}\mathrm{t}\mathrm{a}\mathrm{l},r}=c_{\mathrm{a}\mathrm{u}\mathrm{x},r}+{\sum }_{j=1}^L{c}_{j,r}\mathrm{.}$ If any records are upper bounds rather than exact counts, replace the equality by the corresponding upper bound. For serial circuit layers, write the actual gate word as $B_0{C}_1{B}_1\cdots C_L{B}_L$, with $C_j$ the complete stage-$j$ word and $B_0,\dots ,B_L$ its chronological auxiliary blocks, allowing empty blocks. Put $d_j=d(C_j)$ and $d_{\mathrm{a}\mathrm{u}\mathrm{x}}:={\sum }_{\mathrm{\ell }=0}^{L}d(B_{\mathrm{\ell }})$, retaining each auxiliary block at its position rather than minimizing the depth after deleting stages. Then $d_{\mathrm{t}\mathrm{o}\mathrm{t}\mathrm{a}\mathrm{l}}\le d_{\mathrm{a}\mathrm{u}\mathrm{x}}+{\sum }_j{d}_j$. For each wire/workspace category $s$ (total wires, clean ancillas, dirty ancillas, or other workspace), let $w_{j,s}$ be the stage allocation and $w_{\mathrm{a}\mathrm{u}\mathrm{x},s}$ the shared/interface allocation. Identify these allocations with physical wire sets covering all wires of the total circuit, with each category inherited from the total circuit's declared classification. For clean or dirty ancilla counts, require the declared data/ancilla partitions in the stage and auxiliary records to be restrictions of the corresponding total partition under these wire identifications, and require all corresponding exact return contracts; apply this condition separately to each ancilla coordinate. A coordinate without these compatible supplied contracts is not covered by the bound. If stage workspaces are allocated disjointly, then $w_{\mathrm{t}\mathrm{o}\mathrm{t}\mathrm{a}\mathrm{l},s}\le w_{\mathrm{a}\mathrm{u}\mathrm{x},s}+{\sum }_{j=1}^L{w}_{j,s}$. The local precision entries ${\epsilon }_j$ and error/failure probabilities remain separate fields; they are not resource counts to add.