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TheoremStatement: Literature-sourcedProof: AI-adaptedPipeline-generatedprecheck passaudited 2026-09-30
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A two-piece constant-query PCP of proximity

Statement

Let C be an explicit topologically ordered Boolean circuit over constants, NOT, AND and OR, with s input wires and m non-input nodes. Let X1,X2 be disjoint ordered lists of input wires of lengths n1,n2, put n=n1+n2 and N=s+m≥1, and call (a1,a2) satisfying when it extends to an input on which C outputs one. There is a deterministic uniform construction of a nonadaptive two-piece proximity verifier with external tables πi:F2ni→F2 and private tables F:F2N→F2 and G:F2N2→F2. It makes at most six bit queries and at most 3+5N2 unbiased random-bit choices. Its total proof length is 2n1+2n2+2N+2N2≤4⋅2N2. It has perfect completeness, and rejection probability below η=1/800 implies that both external tables are within relative distance δ0=1/100 of the Walsh–Hadamard encodings of one satisfying named pair.

For the combined named list X1∥X2, adding comparisons with the two-query self-correctors of the corresponding external tables at unit vectors gives an explicit Boolean assignment tester of arity at most six and rejection ratio ρ0=1/1000, including the empty accepted-set and zero-named-input conventions. Its finite constraint list can be enumerated with at most 27N2+4 constraints.

Facts & Assumptions

Given: A circuit and two fixed disjoint ordered lists of named input wires, with all verifier proofs fixed before its random tape is sampled.

[F1]

The input variables can be ordered with the named coordinates first, and the fixed-prefix QUADEQ reduction has N=s+m variables and m+1 equations; extending a named prefix to a solution is equivalent to completing the circuit input to one on which the output is one. (Boolean circuits become quadratic systems with a fixed input prefix)

[F2]

A QUADEQ solution w satisfies every equation Aj⋅(w⊗w)=bj in row-major coordinates. (Quadratic equations and tensor-code oracle tables)

[F3]

WH⁡k(v)(r)=v⋅r, including the singleton zero table at dimension zero. (Walsh–Hadamard encoding and relative Hamming distance)

[F14]

The intended QUADEQ oracle tables have lengths 2N and 2N2, with the vector table preceding the tensor table. (Quadratic equations and tensor-code oracle tables)

[F4]

The BLR family samples independent uniform x,y, queries h(x),h(y),h(x+y), and accepts exactly when h(x)+h(y)=h(x+y); it uses 2k random bits and three calls for a table on F2k. (The BLR linearity test over F_2)

[F5]

If a table's BLR rejection probability is below 1/4, the lemma's lexicographically first decoder is the unique Walsh–Hadamard word within distance less than 1/4, and its distance is at most that rejection probability. (The BLR test supplies a nearby unique linear decoder)

[F6]

For fixed tables near decoded words u,V, the six-query tensor test rejects when V≠u⊗u with probability at least 1/4−4δF−2δG. (Tensor consistency rejects a wrong decoded tensor)

[F7]

For a decoded vector u failing a QUADEQ equation and a table G at distance δG from WH⁡N2(u⊗u), the nonadaptive two-query equation test rejects with probability at least 1/2−2δG and uses m+1+N2 random bits. (A random subsum checks all quadratic equations at once)

[F8]

For fixed tables near decoded words whose named slices differ, the four-query corrected slice test rejects with probability at least 1/2−2δ1−2δ2; it is nonadaptive and counts repeated locations. (Concatenation testing enforces the same decoded prefix)

[F9]

A two-piece proximity verifier uses fixed external tables on F2ni; its soundness conclusion is conditional on rejection strictly below η, and its pair is satisfying when it extends to a full circuit input accepted by C. (Two-piece PCP of proximity and concatenation check)

[F10]

An assignment tester's variables include its named input bits, and its soundness compares every labeling's violated-constraint fraction with ρ times relative distance to the accepted named inputs. (Assignment tester and rejection ratio)

[F11]

A Boolean circuit is a finite acyclic graph of input wires, constants, NOT gates, two-input AND and OR gates, with one designated output evaluated in topological order. (Boolean circuits: basis, fan-in, size, and depth)

[F12]

The two-query corrector at request q chooses uniform y and returns h(y)+h(q+y), with repeated locations permitted. (Two-query linear self-correction)

[F13]

A finite constraint list may contain ordered tuples with repeated variables, and every tuple carries an explicit relation. (Assignment tester and rejection ratio)

[F15]

The distance to an empty accepted set is defined as one; when there are zero named inputs the input cube is a singleton. (Assignment tester and rejection ratio)

Proof

Given: Fix C,X1,X2 and then fix any proof tuple before sampling verifier randomness.

1.1F1F11givenconstruct

Deterministically reorder the primary input list as X1∥X2∥(remaining inputs); this relabeling preserves circuit evaluation. Apply [F1] with named prefix length n=n1+n2, obtaining a QUADEQ instance with N=s+m variables and M=m+1 equations. Its first n1 variables are X1, and the next n2 are X2, so the coordinate injections are j1(r)=(r,0N−n1) and j2(r)=(0n1,r,0N−n). The two designated slices are disjoint and have the prescribed order.

1.2F2F3F4F6F7F8F9F14givenconstruct

Split the fixed proof into external tables π1,π2 and private tables F,G of lengths 2n1,2n2,2N,2N2. Choose uniformly among eight families: BLR on each table, the six-query tensor test, the two-query equation test, and the four-query corrected slice test for each ji. Each family samples only its own independent uniform coins, and every query location is computed before any answer is read.

1.3F1F2F3F4F6F7F8F12givenchoosealgebra

If (a1,a2) is satisfying, choose a completion of the other input wires on which C outputs one. By [F1] it gives a QUADEQ solution w. Set πi=WH⁡ni(ai), F=WH⁡N(w), and G=WH⁡N2(w⊗w). Every BLR family accepts because its table is linear. The tensor family accepts since (w⋅r)(w⋅s)=(w⊗w)⋅(r⊗s), and each equation family accepts since w solves every equation. The named slices of w are ai, so the corrected slice tests compare equal linear values on every tape. If ni=0, both requests are zero and both corrected values are zero. Thus all eight families accept on every tape.

2.1F1F2F4F6F7F8F14step 1.2algebra

The branch coin counts are 2n1,2n2,2N,2N2,4N+N2,M+N2,2n1+N,2n2+N; three selector bits choose the branch. Since ni≤N, M=m+1≤N+1, and N≥1, every branch uses at most 5N2 bits, so the verifier uses at most 3+5N2 bits and at most six queries. Its proof length is the sum of the four table lengths in step 1.2 and is at most 4⋅2N2 because ni≤N≤N2. The circuit reduction, sample addresses, tensor products, and equation subsums are computable in time polynomial in the explicit circuit description, giving a deterministic uniform construction.

2.2F4F5step 1.2givenconstructalgebra

For an arbitrary fixed proof, let ϵj be the rejection probability of each of the eight families and R=18∑j=18ϵj the verifier's rejection probability. If R<1/800, then every ϵj≤8R<1/100. By [F5] the four BLR tables have deterministically selected unique decoders ai∈F2ni, w∈F2N, and v∈F2N2, each at distance at most its BLR rejection rate and therefore below 1/100. Denote these distances by δπ1,δπ2,δF,δG, and reshape v in row-major order as a matrix V.

2.3F4F6F7F8F9F10F12F13step 1.2givenconstruct

Make variables from the raw named input bits and every coordinate of π1,π2,F,G. For each random tape in each core family, list the ordered tuple of queried table variables with the Boolean relation that accepts exactly the answers accepted by that test. The relations are explicit: BLR accepts b1+b2=b3; the tensor test accepts q1+q2=(p1+p2)(p3+p4) on ordered answers p1,p2,p3,p4,q1,q2; the equation test accepts when the queried sum equals its fixed b(z); and a slice test accepts when its corrected sums agree. Repeated query locations yield repeated variables, allowed by [F13]. If n>0, add comparisons indexed by each named coordinate i and each t∈F2L, L=max⁡(n1,n2): take the first ni coordinates of t as y in the piece containing i, and use the tuple (xi,πi(y),πi(y+ei)) with relation xi=πi(y)+πi(y+ei) from [F12]. This comparison has arity three.

3.1F2F6F7step 2.2algebra

If V≠w⊗w, [F6] gives tensor-family rejection at least 14−4δF−2δG>14−6100=19100, hence R>19/800>1/800, a contradiction. Thus V=w⊗w. If w failed any QUADEQ equation, [F7] gives equation-family rejection at least 12−2δG>48100 and hence R>48/800>1/800, also impossible. Thus w solves the reduced instance.

3.2F10step 2.1step 2.3algebraconstruct

Let K be the maximum coin count of a core family and D=n2L when n>0. The comparison list has D constraints, and each core family has 2cj tapes with cj≤K. For n>0, duplicate rows until each of the nine families has P=D2K constraints; P/2cj and P/D are integers. For n=0, omit comparisons and duplicate the eight core families to P=2K constraints each. Therefore the violated fraction is the average of the core-family rejection rates and, when present, the comparison rejection rate. If n>0, D=n2L and L≤n≤N imply log⁡2D≤log⁡2n+L≤2N2; step 2.1 gives K≤5N2. Hence P≤27N2 and there are at most 9⋅27N2≤27N2+4 constraints. If n=0, there are at most 8⋅25N2≤27N2+4. Direct enumeration takes time polynomial in the output length.

3.3F3F9F10F12step 1.3step 2.3algebra

If x is accepted by C, use the satisfying completion and exact tables from step 1.3 as the auxiliary labeling. Every core constraint accepts. For each named coordinate i, πi(y)+πi(y+ei)=ai⋅ei=xi for every y by [F3, F12], so every comparison accepts and the tester has perfect completeness.

4.1F1F5F8step 2.2step 3.1algebra

If either decoded external word ai differed from the corresponding slice of w, [F8] gives that slice family's rejection at least 12−2δπi−2δF>12−4100=46100, hence R>46/800>1/800, impossible. Each ai therefore equals its designated slice. By [F1] the pair is satisfying, and by [F5] dist⁡(πi,WH⁡ni(ai))<1/100 for each i. This proves proximity soundness with η=1/800 and δ0=1/100; if no satisfying pair exists, every fixed proof has rejection at least 1/800.

5.1F3F9F10F12F15step 4.1step 2.3step 3.2algebracases

Suppose n>0, fix any raw named input x and any auxiliary labeling, and let R be the rejection rate of its eight core families. If R≥1/800, the nine-family system rejects at least 89R≥1900>11000δ(x,SAT⁡(C)), since the defined distance is at most one by [F15]. Otherwise step 4.1 supplies a satisfying pair a with each external table at distance below 1/100 from its Walsh–Hadamard word. Put d=∣{i:xi≠ai}∣/n. For a mismatched coordinate, the two queried locations y,y+ei are each uniform in their piece's mask space, so each hits a table-error position with probability δπi<1/100. By [F3, F12] and a union bound, the corrector at ei returns ai with probability greater than 1−2/100=49/50, and the comparison-family rejection is at least (49/50)d. The full system rejects with probability at least (49/450)d≥(1/1000)δ(x,SAT⁡(C)), since d≥δ(x,SAT⁡(C)). If the accepted set is empty, the low-R case is impossible by step 4.1, so the high-R case proves soundness using [F15]. For n=1, the unique named coordinate receives equal weight across its 2L tapes, so the same estimate holds.

5.2F9F10F15step 4.1step 3.2algebracases

If n=0, there is one raw named input. If C accepts it, the distance to the accepted set is zero. Otherwise the accepted set is empty by [F15], and step 4.1 implies every proof tuple has core rejection at least 1/800; the eight-family system therefore has violated fraction at least 1/800>1/1000. A piece with ni=0 contributes no comparison coordinates; its table domain is a singleton and its corrected value at zero is zero, as in step 1.3. A valid circuit has N≥1 because it has a designated output wire, so no separate N=0 verifier case is needed.

6.1step 2.1step 4.1step 3.2step 3.3step 5.1step 5.2algebradischarge-construct∎

The eight-family verifier satisfies the claimed proximity completeness, soundness, query, proof-length, and randomness bounds; the finite constraint construction has the named variables, explicit Boolean relations, arity at most six, perfect completeness, and rejection-ratio inequality for every named input and auxiliary labeling. This proves both assertions.

Remarks

Arora–Barak Corollary 18.26 states the two-piece proximity result when the pieces concatenate to a satisfying full circuit input; its soundness premise is acceptance probability at least 1/2, and the text says that its proof is similar to Corollary 18.25 without giving the details. The named-sublist extension, the constants 1/800 and 1/1000, and the equal-sized constraint construction above are proved here from the local test lemmas. No axiom of choice is used: each decoder is selected by the lexicographic rule in [F5], and a satisfying completion is chosen only for the fixed pair in question.

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