Segmented Taylor LCU simulator

Inputs: A finite list $H={\sum }_{j=0}^{m-1}{a}_j{V}_j$ on a nonzero finite-dimensional complex system space, where $m\ge 1$, $a_j\in \mathbb{R}$ and each $V_j$ is a supplied Hermitian unitary; real time $t$ and a tolerance $0<ϵ\le 1$, each with a finite exact description. The description of $ϵ$ supplies arbitrarily tight rational interval enclosures. Also supply the complete PREPARE/SELECT, inverse, and cost interfaces from LCU decomposition and access model for the Taylor list selected below. For the certified procedure the real descriptions supply arbitrarily tight rational interval enclosures for $S=\mathrm{\Lambda }\mathrm{\mid }t\mathrm{\mid }$ and $S\mathrm{/}\ln 2$, where $\mathrm{\Lambda }={\sum }_j\mathrm{\mid }{a}_j\mathrm{\mid }$. Exact coefficient phases and the required unitary/circuit access for the selected list are separate supplied data; interval names alone do not provide them. Arithmetic, refinement, description and generation costs are charged separately. No efficient classical compiler is asserted.

For the indexed term-query implementation, additionally supply the complete unitary $T(\mathrm{\mid }j⟩\otimes x)=\mathrm{\mid }j⟩\otimes V_{j}x$ for $j<m$, acting as identity at padded term indices, together with every controlled or inverse form actually used and its separate costs. A call to this coherent multiplexer is one indexed term query. Individual accesses to the separate $V_j$ do not grant this operation: when it is assembled from individual controlled $V_j$, each multiplexed call uses $m$ equality-controlled individual calls, and all label tests, routing, phase gates and work are charged. With an independently supplied Taylor SELECT, only its declared internal resource record applies.

Procedure:

1. Refine an enclosure $[{ϵ}_{-},{ϵ}_{+}]$ of $ϵ$ until $0<{ϵ}_{-}$ and ${ϵ}_{+}\le 2{ϵ}_{-}$. Refine an enclosure $[S_{-},S_{+}]$ of $S=\mathrm{\Lambda }\mathrm{\mid }t\mathrm{\mid }$, intersecting with the known nonnegative half-line, until its width is less than ${ϵ}_{-}\mathrm{/}8$. If $S_{+}\le {ϵ}_{-}\mathrm{/}4$, return the exact identity circuit with no oracle calls and the certificate $S\le ϵ\mathrm{/}4$. Otherwise proceed to the segmented branch; no positive lower bound on $S$ is needed. These refinements terminate because $ϵ>0$ and the supplied descriptions give arbitrarily tight rational enclosures. No exact equality test on interval-described reals is used; every $t=0$ or $\mathrm{\Lambda }=0$ input takes the identity branch.
2. In the remaining branch put $q=S\mathrm{/}\ln 2$. In the ideal exact-arithmetic variant set $r=\max (1,\lceil q\rceil )$. In the certified variant refine an enclosure $[q_{-},q_{+}]$ until its width is less than $1$, then set $r=\max (1,\lceil q_{+}\rceil )$. Either choice has $r\ge 1$, $\mathrm{\Lambda }\mathrm{\mid }t\mathrm{\mid }\mathrm{/}r\le \ln 2$, and $r<q+2$. Set $h=t\mathrm{/}r$ and $\eta ={ϵ}^2\mathrm{/}(1600r^2)$. All refinement and segment-count costs are recorded.
3. Set ${\eta }_{-}:={ϵ}_{-}^2\mathrm{/}(1600r^2)$, a positive rational lower bound for $\eta$. Set $n=1$ and successively double $n$ until the exact rational comparison $4\mathrm{/}n!\le {\eta }_{-}$ holds; compute the factorial by finite integer multiplication and set $K=n-1$. This finite scheduler has no real-equality test or unbounded refinement at a fixed failed order. Since $x=\mathrm{\Lambda }\mathrm{\mid }h\mathrm{\mid }\le \ln 2<1$, the tail in Taylor simulation tail bound is at most $2\mathrm{/}n!\le {\eta }_{-}\mathrm{/}2\le \eta \mathrm{/}2$. Its factorial estimate gives the stated logarithmic-over-double-logarithmic order, including the factor of at most two from doubling. Charge the factorial and coefficient arithmetic.
4. Expand $M_K(h)$ into the ordered product-term LCU list of Finite Taylor LCU polynomial. The certificate $\mathrm{\Lambda }\mathrm{\mid }h\mathrm{\mid }\le \ln 2$ and Taylor simulation tail bound prove $s_K\le 2$ analytically. Add two distinct identity terms $+qI,-qI$ with $q=(2-s_K)\mathrm{/}2$, retaining zero-weight padding labels if needed; the matrix is unchanged and the listed norm is exactly $2$. Under the indexed term-query implementation, implement each Taylor SELECT using at most $K$ controlled indexed term queries: process tuple positions from $K$ down to $1$, condition each call on a valid tuple having that position, and use its term label. Compute/uncompute those labels in charged work registers. This reverse execution order yields the displayed product $V_{j_1}\cdots V_{j_k}$. Apply the coefficient phase separately and act as identity on padding and unused labels. The adjoint SELECT reverses this sequence and uses the declared inverse calls.
5. For each of the $r$ segments, allocate a fresh clean register containing the expanded-term index and every PREPARE work wire. Build $W=P^{†}{S}_{\mathrm{s}\mathrm{e}\mathrm{l}}P$ using the exact coefficient phases and the padded invalid-index behavior. Apply the phase-corrected chronological circuit $W,R_0,W^{†},R_0,W$, with $R_0=I-2{\mathrm{\Pi }}_0$ on the complete clean coefficient/work register. Thus the segment unitary is $-W{R}_0{W}^{†}{R}_{0}W$, with two reflection calls, two forward $W$ calls, and one inverse call.
6. Compose the $r$ segment circuits in time order. Retain every segment's coefficient/work register in the output dilation; do not measure or claim exact cleanup. The output is the finite unitary/access-circuit description together with the chosen $r,K$, coefficient table or generator, and resource record.

The default procedure is uncontrolled. A controlled variant is defined only when controlled access to every component is supplied; the known minus sign is applied as a phase on the outer control, not discarded. If a compiled implementation is used, the per-call operator-norm error bounds ${\delta }_i$ must satisfy the certified sum ${\sum }_i{\delta }_i\le {\delta }_{\mathrm{i}\mathrm{m}\mathrm{p}\mathrm{l}}\le ϵ\mathrm{/}2$. The exact-access variant has ${\delta }_{\mathrm{i}\mathrm{m}\mathrm{p}\mathrm{l}}=0$. Every PREPARE, SELECT, inverse, reflection, control, coefficient, table, precision, wire, and gate cost remains explicit.