LCU decomposition and access model

Let $S$ be a finite-dimensional complex-inner-product system space and let $M={\sum }_{j=0}^{m-1}{c}_j{V}_j,c_j\in \mathbb{C},$ where $m\ge 1$, each $V_j:S\to S$ is unitary, and $\alpha :={\sum }_{j=0}^{m-1}\mathrm{\mid }{c}_j\mathrm{\mid }>0.$ The finite ordered list $(c_j,V_j{)}_{j<m}$ is an LCU representation of $M$; it is part of the input, and a matrix description alone does not supply circuits for any $V_j$.

Set $q=\lceil {\log }_{2}m\rceil$ and let $A_{\mathrm{i}\mathrm{d}\mathrm{x}}$ be the $q$-qubit index register, with the one-dimensional $q=0$ case allowed. Its computational indices are $0,\dots ,2^q-1$. For $j<m$ put ${\omega }_j=c_j\mathrm{/}\mathrm{\mid }{c}_j\mathrm{\mid }$ when $c_j\mathrm{\ne }0$ and ${\omega }_j=1$ when $c_j=0$. Define the complete SELECT unitary by $S_{\mathrm{s}\mathrm{e}\mathrm{l}}(\mathrm{\mid }j⟩\otimes x)=\{\begin{array}{ll}\mathrm{\mid }j⟩\otimes {\omega }_j{V}_{j}x,& j<m,\\ \mathrm{\mid }j⟩\otimes x,& m\le j<2^q\mathrm{.}\end{array}$ This basis rule fixes every valid and padded index; it extends linearly to all superpositions and acts as identity on any separately declared work register.

A PREPARE access is a fully specified unitary $P$ on the index register and all its declared work registers, with $P\mathrm{\mid }{0}_{\mathrm{a}\mathrm{n}\mathrm{c}}⟩=e^{i\theta }({\sum }_{j<m}\sqrt{\mathrm{\mid }{c}_j\mathrm{\mid }\mathrm{/}\alpha }\mathrm{\mid }j⟩)\otimes \mathrm{\mid }{0}_{\mathrm{w}\mathrm{o}\mathrm{r}\mathrm{k}}⟩$ for some phase $\theta \in \mathbb{R}$. The same full unitary, including its action on every nonzero input, determines $P^{†}$; neither an inverse nor a controlled call is implied unless explicitly supplied. The allowed global phase cancels between $P$ and $P^{†}$ in the LCU block. PREPARE work wires are included among the ancillas projected to zero.

For an amplitude-table implementation with $D=2^q$ entries, the dense fixed-width input length, table reading, arithmetic, and coefficient precision are separate costs. If the continuous-rotation QC24 procedure QC24 State Preparation is used, its source theorem QC24 State Preparation Rotation Level Upper Bound gives $O((q+1)D)$ bounded-arity gates and serial depth, with at most $\max \{q-1,0\}$ reusable clean work bits; the table and exact arithmetic costs remain separate. This bound is for continuous rotations. Finite-alphabet synthesis and finite-precision bit-time require separate guarantees. A supplied PREPARE circuit is instead charged by its declared full description, gates, wires, and generation cost.

The LCU block circuit is the complete unitary $W:=P^{†}{S}_{\mathrm{s}\mathrm{e}\mathrm{l}}P$ on all coefficient/work ancillas and the system. The access record separately lists PREPARE, PREPARE${}^{†}$, SELECT, SELECT${}^{†}$, and every controlled form used, together with their query, gate, wire, coefficient-bit, and classical-description costs under Hamiltonian simulation error and resources and Circuit-family and computation cost model. Unspecified access, inverse access, controlled access, and table loading have no free cost. The zero LCU representation is outside this access model because $\alpha =0$ does not define a normalized coefficient state.