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QC24 State Preparation Rotation Level Upper Bound
Statement
For an integer , , and a normalized explicit amplitude table, QC24 State Preparation exactly prepares the target ray using at most prefix rotations and at most leaf phases. The specified Toffoli flag chain expands each operation into bounded-arity gates using at most reusable clean work bits, so the complete circuit has gates and serial depth, in addition to the data qubits. For , the ray is trivial and no gate is needed.
Facts & Assumptions
Given: The exact algorithm, a normalized table , and .
The algorithm applies prefix rotations with angles determined by the child subtree norms, uses the stated clean Toffoli flag chain, and applies each nonzero relative leaf phase after subtracting the reference argument (QC24 State Preparation).
At a positive-norm prefix, the rotation half-angle has cosine and sine equal to the child-radius ratios (QC24 Prefix Norm Rotation Identities).
Toffoli maps to and preserves its two control bits (Toffoli and Fredkin gates).
A controlled operation on a control-first register applies its target unitary exactly on the control- subspace and the identity on the control- subspace (Controlled Unitary Access).
The Pauli matrix interchanges computational basis vectors, for (The Pauli matrices).
The ordered bitstring encoding places table entry at basis vector (Big-endian encoding of ordered bit strings).
In the algorithm's convention, has first column and is unitary (Pauli formula for an axis rotation).
The ordered computational basis is orthonormal (The computational basis is orthonormal).
A finite layered circuit denotes the chronological product of its local gate embeddings (Denotational semantics of a finite layered circuit).
Every nonzero satisfies for the principal argument, and for real (Every nonzero complex number has a unique polar form with and , , , and ).
Proof
Given: As in Facts & Assumptions.
Before any rotation the only nonzero prefix amplitude is the empty-prefix amplitude because the table is normalized.
Consider a computational-basis control word . Conjugating each zero-control by turns the requested pattern into all ones by [F5]. Starting from zero work bits, [F3] first sets and then, successively, ; induction on shows the final flag is exactly on the requested control pattern. The controlled operation in [F4] therefore acts only on that branch and changes neither the controls nor the flag. The basis action [F3] shows each Toffoli is its own inverse, and [F5] shows is its own inverse, so reversing the Toffoli list and undoing the conjugations restores all work bits to zero. For a leaf phase, the phase gate is diagonal and also leaves the flag's bit value unchanged. For one control the direct controlled block has the same branch action, and for no controls the one-qubit block acts on every branch. The Toffoli and are basis permutations, the rotations are unitary by [F7], and controlled blocks are unitary by [F4]; the phase gates are unitary by [F10]. The basis calculation extends linearly to superpositions under [F8] and [F9].
Suppose at depth every prefix has amplitude on under the basis order in [F6]. If , [F1], [F2], and [F7] split that amplitude into the nonnegative real amplitudes and on the two child prefixes. Step 1.2 shows the rotation is confined to the selected prefix branch; distinct length- prefixes therefore leave each other's amplitudes unchanged. If , both children have radius zero and the zero branch remains zero without division. Thus induction gives the nonnegative real leaf amplitude at every leaf.
Put for the first nonzero leaf. For every other nonzero leaf, [F10] gives . The reference leaf has unchanged amplitude , so the same scalar multiplies every nonzero coordinate. A zero relative phase needs no gate. Its flag ladder restores the work bits by step 1.2, and a diagonal phase leaves the flag's bit value unchanged. Zero leaves stay zero. Thus the joint output is with the reused workspace zero, and its data ray is exactly .
The number of prefixes at depths through is , and there are at most leaf phases. A control of bits uses Toffolis, at most gates for zero-control conjugations, and one controlled one-qubit block; it uses clean work bits. Prefix rotations have controls and leaf phases have , so the maximum work count is ; the cases use constant resources. Since , each of at most operations costs gates and serial depth, and step 1.2 shows the same work bits are restored and reused. For , both operation lists are empty and the normalized one-entry table has a single ray.
Depends on
- QC24 State Preparation
- QC24 Prefix Norm Rotation Identities
- Toffoli and Fredkin gates
- Controlled Unitary Access
- The Pauli matrices
- Big-endian encoding of ordered bit strings
- Exact one-qubit gates and rotations
- Pauli formula for an axis rotation
- The computational basis is orthonormal
- Finite circuit resource accounting
- Denotational semantics of a finite layered circuit
- Every nonzero complex number has a unique polar form $r(\cos\theta+i\sin\theta)$ with $r>0$ and $-\pi<\theta\le\pi$
- $\exp(x+iy)=e^x(\cos y+i\sin y)$, $|\exp(x+iy)|=e^x$, and $e^{i\pi}+1=0$
Used by
- Finite CKS sparse QLSP with variable-time inverse estimation Algorithm
- LCU block-encoding construction Algorithm
- Sparse Hermitian block encoding Algorithm
- LCU decomposition and access model Definition
- Amplitude-Table State Preparation Input Boundary Example
- Amplitude Table Precision and Compilation Theorem
- QC24 Explicit State-Preparation Cost Guarantee Theorem
Cited to discharge well-definedness by QC24 State Preparation.
Dependency tree · two levels
47 results within two dependency steps of this one, each drawn at its shortest distance from it. An arrow runs from a result to what uses it, so the chart reads left to right and ends at this result, which carries a heavier outline. Every node is a link to that result. Click elsewhere on the chart to enlarge it.
Sources
- Vivek V. Shende, Stephen S. Bullock, and Igor L. Markov, Synthesis of Quantum Logic Circuits (standard reference, not scraped)
- John Preskill, Quantum Computation, Chapter 5, Classical and Quantum Circuits (standard reference, not scraped)