How statement and proof provenance work
The first chip identifies the source of the statement or construction; the second identifies the source of its local proof or verification.
- Literature-sourced: the exact statement appears in a cited source; only wording and notation differ.
- AI-adapted: a semantically identical restatement of literature-sourced material, modulo indexing, notation, and boundary cases adopted by the library.
- AI-generated: a genuinely novel statement formulated by AI, with no source for the claim itself.
These labels describe origin, not correctness: citations and verification chips remain separate evidence.
Finite circuit resource accounting
Definition
Fix a finite gate alphabet with maximum arity and a circuit from Finite circuit syntax and ordered wire labels. The declared size is the number of gate occurrences, equivalently ; the declared depth is the number of explicit layers, not a minimum over alternate layerings; the width is the number of all wires, including workspace wires. The operation model may also assign weighted gate costs, classical bit costs, and query costs; these are separate coordinates and are summed over the calls actually made.
A workspace wire is an ancilla. A clean-ancilla promise specifies computational-basis zero states for the ancillas and requires their exact return for every allowed data input: if is the implemented unitary, is the declared data unitary, and is the specified joint zero vector, then for every allowed data vector . A dirty-ancilla promise permits an arbitrary ancilla state independent of the data input; it may be correlated with an untouched reference. Exact dirty-ancilla restoration means the implemented unitary on data and ancillas is on the entire joint space, where is the declared unitary on data. The same operator equality then holds after tensoring with the identity on any finite untouched reference. Consequently, product input between the data and the combined ancilla/reference system remains product after the operation. No uncorrelated-output claim is made for an initially data-correlated ancilla.
A controlled or inverse operation is counted only when the operation model explicitly grants that access or supplies a construction; its charge is recorded separately from an ordinary call. Inverse availability and query or gate charges are also recorded separately from controlled forward access. In particular, the matrix of alone supplies neither a controlled call nor an inverse query, in accordance with Controlled Unitary Access and Inverse Unitary Access.
Facts & Assumptions
Given: A finite layered circuit, its declared gate alphabet, workspace labels, and operation-cost model.
Finite circuit syntax and ordered wire labels: a circuit is a finite ordered list of explicit layers, each a finite list of gate occurrences.
Controlled Unitary Access: controlled access is an explicitly granted capability.
Inverse Unitary Access: inverse access is explicitly granted and charged separately from forward access.
Proof
Flattening the layer lists gives a finite list containing each gate occurrence exactly once by the circuit syntax. Its length is , so the size definition counts exactly the occurrences in the circuit.
Reordering gates within a disjoint layer changes neither that layer's finite cardinality nor the sum of the layer cardinalities. Thus the declared size is unchanged by within-layer ordering; the separately declared depth remains the number of layers.
The access coordinates are assigned only to calls named by the operation model. By [F2]–[F3], controlled and inverse calls require their own explicit declarations, so no query or gate cost is inferred from a matrix description alone.
Depends on
Used by
- BBHT search when the marked count is unknown Algorithm
- Exact generator-tableau simulator for stabilizer circuits Algorithm
- Fixed-one Grover search with candidate verification Algorithm
- Gray-Path Synthesis of a Two-Level Gate Algorithm
- Known-count Grover search by exact integer maximization Algorithm
- Known-count search by randomized Grover iteration Algorithm
- MNRS finite reversible-walk finding Algorithm
- One Grover iterate in the standard bit-query model Algorithm
- Power-of-two dihedral hidden-subgroup sieve Algorithm
- Quantum counting by uniform-state amplitude estimation Algorithm
- Reversible binary dot-product query Algorithm
- Reversible embedding of a Boolean circuit Algorithm
- Szegedy-walk marked-set detection Algorithm
- One oracle query can require many ordinary gates Counterexample
- Amplitude estimation and counting input/output contract Definition
- Ancilla-free Rz approximation problem and T-count Definition
- Circuit Optimization Task Definition
- Circuit-family and computation cost model Definition
- Clean and dirty ancillas Definition
- Clifford+T gate library and exact matrices Definition
- Coherent XOR function oracle Definition
- Element-distinctness Johnson walk and value access Definition
- Finite open-graph adaptive measurement pattern Definition
- Finite quantum promise-computation model Definition
- Full-list uniform quantum circuit family Definition
- Nonoracle quantum gate cost Definition
- Promise query instance and oracle family Definition
- QC24 Clean Ancilla Output Projection Definition
- QC24 State Preparation Cost Model Definition
- QFT ideal and finite-set gate-cost models Definition
- Random-access quantum-memory gate model Definition
- Teleportation protocol resource record Definition
- Toffoli and Fredkin gates Definition
- Oracle conversion and uncomputation examples Example
- Boolean circuits compile exactly into the QC14 gate alphabet Lemma
- Circuit Resource Composition Lemma
- Exact Central Controlled-Z Absorption at a QSD Node Lemma
- Exact Gray-code synthesis of multiplexed y- and z-axis rotations Lemma
- Gray-Code Synthesis of a Multiplexed Axis Rotation Lemma
- Gray-code synthesis of a multiplexed Z rotation Lemma
…and 33 more results.
Dependency tree · two levels
12 results within two dependency steps of this one, each drawn at its shortest distance from it. An arrow runs from a result to what uses it, so the chart reads left to right and ends at this result, which carries a heavier outline. Every node is a link to that result. Click elsewhere on the chart to enlarge it.
Sources
- John Preskill, Quantum Computation, Chapter 5: Classical and Quantum Circuits (standard reference, not scraped)
- Ronald de Wolf, Quantum Computing: Lecture Notes, arXiv:1907.09415v6 (standard reference, not scraped)