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How statement and proof provenance work

The first chip identifies the source of the statement or construction; the second identifies the source of its local proof or verification.

  • Literature-sourced: the exact statement appears in a cited source; only wording and notation differ.
  • AI-adapted: a semantically identical restatement of literature-sourced material, modulo indexing, notation, and boundary cases adopted by the library.
  • AI-generated: a genuinely novel statement formulated by AI, with no source for the claim itself.

These labels describe origin, not correctness: citations and verification chips remain separate evidence.

Two-gate padded history state

Example

Take the algebraic one-qubit macro-gate circuit U1=X, U2=Z and tolerance ε=1. Applying the propagation formula at this macro-step level gives K=4, N=6, and U3=⋯=U6=I. Write its legal clocks as c0=000000,c1=100000,…,c6=111111. This is an algebraic illustration of the propagation formula, rather than a literal fixed-alphabet input to the uniform-circuit construction: expanding X=HT4H and Z=T4 changes the gate count and padding. The normalized history state is ∣η⟩=17(∣0⟩∣c0⟩+∣1⟩∣c1⟩−∣1⟩∣c2⟩−∣1⟩∣c3⟩−∣1⟩∣c4⟩−∣1⟩∣c5⟩−∣1⟩∣c6⟩).

Facts & Assumptions

Given: The unary-clock propagation formula and padded circuit conventions from Five-local history-state adiabatic path and History state and padded output.

[F1]

Each propagation term couples only its two adjacent legal clocks and its kernel condition on their data amplitudes is ϕℓ=Uℓϕℓ−1 (History state and padded output).

[F2]

Dirac kets denote the corresponding computational basis vectors (Dirac Notation Conversion).

Verification

1.1givenF1F2algebra

At the algebraic macro-step level, the padding count is K=⌈2⋅2/1⌉=4, so N=6. The prefix states are V0∣0⟩=∣0⟩, V1∣0⟩=X∣0⟩=∣1⟩, and V2∣0⟩=ZX∣0⟩=Z∣1⟩=−∣1⟩. Since U3,…,U6 are identities, all later prefix states remain −∣1⟩. Substitution in the history-state formula of [F1] gives the displayed normalized vector.

2.1givenF1step 1.1algebra

For ℓ=1, the endpoint patterns are a1=00,b1=10 on clock bits (1,2); for ℓ=2,3,4,5, the internal patterns are aℓ=100,bℓ=110 on bits (ℓ−1,ℓ,ℓ+1); for ℓ=6, the endpoint patterns are a6=10,b6=11 on bits (5,6). On every adjacent pair (cℓ−1,cℓ), the data amplitudes in step 1.1 satisfy ϕℓ=Uℓϕℓ−1: the first two transitions apply X and Z, and the last four apply I.

3.1F1step 2.1algebra∎

By [F1], each hℓ restricted to its pattern pair has quadratic form 12∥ϕℓ−Uℓϕℓ−1∥2. Step 2.1 makes this zero for each ℓ=1,…,6; all other legal clock amplitudes are outside that term's two-pattern support. Thus every propagation term annihilates ∣η⟩, and the sum Hprop does as well.

Depends on

Used by

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Dependency tree · two levels

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Sources