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TheoremStatement: AI-adaptedProof: AI-generatedPipeline-generatedjudge pass (gpt-6-luna)
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The first chip identifies the source of the statement or construction; the second identifies the source of its local proof or verification.

  • Literature-sourced: the exact statement appears in a cited source; only wording and notation differ.
  • AI-adapted: a semantically identical restatement of literature-sourced material, modulo indexing, notation, and boundary cases adopted by the library.
  • AI-generated: a genuinely novel statement formulated by AI, with no source for the claim itself.

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Zero-completed query simulation is exact and uses one raw query

Statement

For N≥1 and M=2m with N≤M<2N, the procedure of Reversible zero-completion of an N-address bit query implements exactly one zero-completed XOR query per raw N-address query, restores all scratch registers, and uses no controlled oracle call.

Facts & Assumptions

Given: The finite address registers, the raw XOR action on addresses 0,…,N−1, the procedure instructions, and clean scratch registers.

[F1]

Reversible zero-completion of an N-address bit query: for N=M it makes one direct raw query and returns; for N<M it computes v=[j<N], routes a clean N-level raw-address register QN to q=j if valid and q=0 otherwise by a finite controlled basis permutation, prepares a fresh response helper in ∣+⟩ from ∣0⟩, swaps it with the caller's response only when valid, makes one raw query, reverses the response swap, applies H to return the helper to ∣0⟩, and reverses the routing and comparison operations.

[F2]

Boolean oracle query model for search lower bounds: on a valid raw address q, Ox∣q,b⟩=∣q,b⊕xq+1⟩.

[F3]

Exact one-qubit gates and rotations: H∣0⟩=∣+⟩.

[F4]

Toffoli and Fredkin gates: a Fredkin gate swaps its two target bits exactly when its control bit is 1.

[F5]

Reversible embedding of a Boolean circuit and Gate, workspace, and serial-depth costs of reversible embedding: the finite Boolean comparison circuit computes the validity bit reversibly into a clean target and restores its work bits by reversing its explicit gate list. The N-level raw-address routing is the finite basis permutation specified directly in [F1].

Proof

1.1givenF1F5inductionalgebra

If N=M, the procedure returns after one direct raw oracle call, which has the required action. Suppose N<M. The comparison recurrence maintains Er=1 exactly when the first r bits of j and N agree, and Lr=1 exactly when the first differing bit has j-bit 0 and N-bit 1. Induction on r therefore gives v=Lm=1 iff j<N. The controlled transpositions in [F1] preserve j and v and send a clean QN basis state ∣0⟩ to ∣j⟩ when v=1 and j<N, and leave it at ∣0⟩ otherwise. Thus the raw query address is an N-level basis state that equals j on valid padded addresses and 0 on invalid ones.

1.2F1F2F3F4algebra

In the N<M branch, when v=1, [F4] swaps the caller's response b into r; the raw oracle then changes it to b⊕xj+1, and reversing the swap returns exactly this bit to the caller and leaves r=∣+⟩, which the final H maps to ∣0⟩. When v=0, the route sets q=0, which is valid because N≥1, while r=∣+⟩; the raw query applies either I or X to r, both of which fix ∣+⟩, and the caller's response is unchanged. The final H again returns r to ∣0⟩.

2.1F1F2F3F4F5step 1.1step 1.2algebra∎

The raw oracle preserves its address, so the inverse controlled routing permutation clears QN after the response swap is undone. By step 1.2 the helper response is then ∣+⟩, so the prescribed H has returned it to ∣0⟩. Reversing the comparison circuit clears v and its work registers. In both branches the resulting action on each padded-address basis state is ∣j,b⟩↦∣j,b⊕xj+1⟩ for j<N and ∣j,b⟩↦∣j,b⟩ for j≥N; linearity gives the same zero-completed action on every superposition. Exactly one raw oracle call occurred in either branch, and no controlled call was used.

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Sources