How statement and proof provenance work
The first chip identifies the source of the statement or construction; the second identifies the source of its local proof or verification.
- Literature-sourced: the exact statement appears in a cited source; only wording and notation differ.
- AI-adapted: a semantically identical restatement of literature-sourced material, modulo indexing, notation, and boundary cases adopted by the library.
- AI-generated: a genuinely novel statement formulated by AI, with no source for the claim itself.
These labels describe origin, not correctness: citations and verification chips remain separate evidence.
Gate, workspace, and serial-depth costs of reversible embedding
Statement
Let , , and . Let a finite topologically ordered Boolean DAG have non-input nodes, including constants, and input-port uses counted with multiplicity. Its gates are NOT, AND, OR, and constants, with fan-in at most two, and it has ordered output ports computing . Under the fixed elementary alphabet in Finite circuit resource accounting, counting each occurrence of , CNOT, and Toffoli as one gate and one serial layer, Reversible embedding of a Boolean circuit returns a circuit on the ordered input, target, and work registers implementing
for every basis input and every target string . It uses at most elementary gate occurrences, at most clean work bits, and serial depth at most . The same operator action holds coherently on arbitrary superpositions and after adjoining any finite reference register.
Facts & Assumptions
Given: The finite Boolean DAG convention, the procedure in Reversible embedding of a Boolean circuit, and the gate actions in the local suppliers. Prove correctness, clean-work restoration, and the stated bounds.
Boolean circuits: basis, fan-in, size, and depth: A Boolean circuit has constants and , and NOT, AND, and OR gates; AND and OR have fan-in two, while NOT has fan-in one. Its size is its number of non-input gates.
Reversible embedding of a Boolean circuit: The procedure computes each gate into fresh zero work, copies the designated outputs into arbitrary targets, and reverses the node-evaluation list.
Fresh-target NOT and OR gadgets: The fresh-target sequences write for NOT and for OR without changing sources.
Toffoli computes into a clean target and uncomputes it: Toffoli computes into a clean target, and copying followed by the inverse Toffoli restores that target to zero.
Clean and dirty ancilla identities extend to references and mixed states: Clean workspace identities extend to arbitrary references and matrices.
X, CNOT, Toffoli, and Fredkin are involutions: , CNOT, and Toffoli are each their own inverse.
The Pauli matrices: The Pauli matrix sends to and to .
Ordered tensor registers, their inner product, and wire permutations: An ordered tensor register retains the displayed factor order, and its product basis is ordered lexicographically by factor-index tuples.
Big-endian encoding of ordered bit strings: The first bit is the most significant position in the computational-basis index.
Big-endian bit-string indices are bijective: Each length- bit string labels exactly one computational-basis vector of the -qubit register.
Denotational semantics of a finite layered circuit: A chronological list of layers , with applied first, denotes .
The product basis is orthonormal and tensor dimensions multiply: The ordered tensor-product computational basis is orthonormal, including the work-register factors.
Finite circuit resource accounting: Circuit size counts gate occurrences, depth counts explicit layers, and width counts all wires including workspace wires.
Proof
Let be the number of two-port nodes whose two ports name the same source. Each non-input node uses at most three evaluation gates: at most one for a constant, two for NOT, one for AND, and three for OR. Each repeated-source node adds one CNOT copy and one uncopy, so the forward pass uses at most gates. Since each such node accounts for two of the port uses, , and the forward bound is at most . It uses value bits and temporary bits.
The output ports are copied by CNOTs into distinct target bits. Reversing the complete node-evaluation list uses at most another gates. By [F6], each gate is its own inverse; reversing both order and gate sequence therefore implements the inverse computation and returns every value and temporary bit to zero. The total is at most gate occurrences. A serial execution assigns each occurrence its own explicit layer, so the depth has the same bound by [F13]; [F11] specifies the chronological operator product.
Use [F9]–[F10] to identify each ordered bit string with its unique basis vector. Induct along the supplied topological order. A constant- node leaves its zero bit unchanged and a constant- node uses [F8]; NOT and OR nodes receive the outputs in [F3], and AND nodes receive the output in [F4]. If a two-port node repeats a source value , its fresh scratch bit is set to by CNOT; the two distinct physical control wires then both hold , so AND gives and OR gives . The scratch is immediately uncomputed by the same CNOT. Thus every value bit equals its Boolean node value and all temporary bits are zero before the output copy. The output CNOTs produce ; reversing the node list then restores every work bit without touching the input or target registers, whose order is fixed by [F7]. Since applying twice returns , the target action is a permutation of the ordered basis and is unitary by [F12]; the compiled gate list is unitary by [F6] and [F11].
The basis identity in Step 3.1 extends by linearity to every input vector, so it is the clean-ancilla identity required by [F5]. The lemma then extends it to every finite reference register and every matrix, hence to density matrices. The construction uses only the supplied finite list; no choice principle is used.
Depends on
- Reversible embedding of a Boolean circuit
- Clean and dirty ancillas
- Clean and dirty ancilla identities extend to references and mixed states
- Finite circuit resource accounting
- Boolean circuits: basis, fan-in, size, and depth
- Fresh-target NOT and OR gadgets
- Toffoli computes into a clean target and uncomputes it
- Toffoli and Fredkin gates
- X, CNOT, Toffoli, and Fredkin are involutions
- Denotational semantics of a finite layered circuit
- Finite registers and their ordered computational bases
- Big-endian encoding of ordered bit strings
- Big-endian bit-string indices are bijective
- Ordered tensor registers, their inner product, and wire permutations
- Tensor products of finitely many linear maps
- CNOT and Control-Target Order
- The Pauli matrices
- The computational basis is orthonormal
- The product basis is orthonormal and tensor dimensions multiply
Used by
- Coherent XOR function oracle Definition
- A reversible AND oracle with clean work Example
- Boolean circuits compile exactly into the QC14 gate alphabet Lemma
- Clean reversible controlled multiplication by a cyclic constant Lemma
- Efficient coherent amplitude-grid rounding Lemma
- Compute-copy-uncompute yields a clean coherent function query Theorem
- Correctness of the reversible modular multiplier Theorem
- Element-distinctness gate cost in the QRAM model Theorem
- Gate and bit cost of modular multiplication and powering Theorem
- Oracle phase queries and compiled gate costs are distinct Theorem
- Parallel depth of reversible Boolean embedding Theorem
- Zero-completed query simulation is exact and uses one raw query Theorem
Dependency tree · two levels
41 results within two dependency steps of this one, each drawn at its shortest distance from it. An arrow runs from a result to what uses it, so the chart reads left to right and ends at this result, which carries a heavier outline. Every node is a link to that result. Click elsewhere on the chart to enlarge it.
Sources
- John Preskill, Quantum Computation, Chapter 5: Classical and Quantum Circuits (updated July 2015) (standard reference, not scraped)
- Ronald de Wolf, Quantum Computing: Lecture Notes, arXiv:1907.09415v6 (standard reference, not scraped)