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Parallel depth of reversible Boolean embedding
Statement
For a finite Boolean DAG over constants, NOT, AND, and OR, with fan-in at most two, let be its number of non-input nodes, its number of input-port uses counted with multiplicity, and its number of ordered output ports. Let be the number of nonempty layers obtained by grouping each non-input node according to the maximum number of non-input vertices on a path ending at that node. Let be the maximum number of input-port occurrences from one source wire into gates in one such layer, with if there are no gate input ports. There is a layer-respecting reversible circuit implementing the same XOR embedding as Reversible embedding of a Boolean circuit with gate occurrences and work bits. Let
Its depth is at most
The bound permits coherent fan-out of computational-basis labels by CNOT trees and does not assert arbitrary-state cloning or constant-factor preservation of Boolean-DAG depth. For bounded fan-in, .
Facts & Assumptions
Given: The reversible embedding construction, finite gate/depth conventions, and disjoint ordered registers. Prove the scheduling and resource bound.
Gate, workspace, and serial-depth costs of reversible embedding: The compute-copy-reverse construction implements the XOR embedding and restores clean work.
Finite circuit resource accounting: Size counts gate occurrences, depth counts explicit layers, and width counts all wires including workspace wires.
Denotational semantics of a finite layered circuit: Chronological layers , with applied first, denote ; disjoint gates in a layer are interpreted as parallel.
Ordered tensor registers, their inner product, and wire permutations: An ordered tensor register retains the displayed factor order, and its product basis is ordered lexicographically by factor-index tuples.
Tensor products of finitely many linear maps: The tensor map of a finite family of linear maps acts on each elementary tensor by applying the corresponding map to each factor.
CNOT and Control-Target Order: In the ordered two-qubit basis, .
The Pauli matrices: The Pauli matrix flips a computational-basis bit.
Toffoli and Fredkin gates: Toffoli maps to and preserves its two controls.
Fresh-target NOT and OR gadgets: NOT and OR are computed into a distinct zero target by the stated two- and three-gate gadgets, with source wires preserved.
X, CNOT, Toffoli, and Fredkin are involutions: , CNOT, and Toffoli are each their own inverse and unitary on their ordered registers.
The computational basis is orthonormal: Each one-qubit computational basis is an orthonormal basis for its declared inner product.
The product basis is orthonormal and tensor dimensions multiply: Ordered tensor products of finite orthonormal factor bases form an orthonormal basis, including empty registers.
Big-endian encoding of ordered bit strings: Ordered bit strings label computational-basis slots by their big-endian indices.
Big-endian bit-string indices are bijective: Every length- bit string labels exactly one computational-basis vector, including the empty string.
Proof
For a source wire used times in one DAG layer, start with that wire as one leaf and in each round apply CNOT from each current leaf to at most one fresh zero target. After rounds there are at least distinct leaves, so at most rounds suffice. The tree needs CNOTs, and summing over source wires and layers gives at most copies. By [F4], each leaf carries the source's basis value and each CNOT leaves its control unchanged. The rounds are successive explicit layers in the order specified by [F9], counted by [F10].
Fix a DAG layer and suppose each source wire at its start holds its Boolean circuit value. Fan out every source to private leaves by Step 1.1. Each non-input node has a distinct fresh zero value bit. A constant- node leaves that bit unchanged, and a constant- node flips it by [F5]. For NOT, the two sublayers in [F7] write ; for AND, [F6] writes ; for OR, [F7] writes . Repeated logical sources have distinct physical leaves, and every gate preserves its leaves. Targets are distinct between nodes, so each of these at most three gate sublayers has disjoint supports. Reversing the fan-out trees restores all private leaves to zero, since the evaluation gates did not change them; [F8] supplies the inverse CNOTs. By [F9] these are chronological sublayers, and [F10] counts them. The layer therefore takes at most depth.
If a non-input node feeds a node , every longest path ending at extends by that edge, so the layer index of is strictly smaller than the layer index of . Induct on the layer index. At the first layer all non-input predecessors are absent; at a later layer every non-input predecessor has its correct value by induction. Step 2.1 then writes the Boolean value of each node in the current layer and clears its temporary leaves. Thus after all layers every value bit equals its node's Boolean evaluation, including when two ports use the same source, and all fan-out leaves are zero.
For each output source selected times, use Step 1.1 to produce private leaves in at most rounds. Copy each leaf into its distinct target bit in one layer, then reverse the tree in at most rounds. Summing over output sources gives at most temporary targets, and the output stage has depth at most . This also covers repeated output ports and output sources that are input wires. The chronological composition is the one in [F9], and [F10] counts the explicit layers.
Copy each output into its target, then reverse the layer computations. In reverse order the fan-out tree is first recreated, the node gates are inverted to clear their value bits, and the fan-out tree is then undone; [F8] makes these same CNOT, X, and Toffoli gates available as inverses. This costs at most another depth and returns every value bit and temporary copy to zero. Adding this reverse depth, the output stage from Step 4.1, and the forward depth from Steps 2.1–3.1 gives . There are value bits, at most temporary input-copy bits, and at most output-copy bits, for work. The input-copy trees and their reversals in both computation passes use at most CNOTs, and the output-copy trees and their reversals use at most CNOTs, output copying uses CNOTs, and Boolean evaluation and reversal use at most gates, hence the total is . Since fan-in is at most two, . By Step 3.1 each output source holds its Boolean value, so Step 4.1 changes the target to ; reversing node computations restores the work without changing the input or target. This is the XOR embedding specified by [F1]. By [F11]–[F14], ordered bit strings identify the complete computational basis of the input, target, and work registers, including the zero-qubit case; the basis identity therefore extends by linearity to superpositions. The finite circuit denotes the chronological operator product [F9], its resource coordinates are counted by [F10], and fan-out CNOTs may entangle copies during computation, but reversing them restores each copy bit to zero, so no arbitrary unknown state is cloned.
Depends on
- Boolean circuits: basis, fan-in, size, and depth
- Gate, workspace, and serial-depth costs of reversible embedding
- Finite circuit resource accounting
- Denotational semantics of a finite layered circuit
- The Pauli matrices
- Toffoli and Fredkin gates
- Fresh-target NOT and OR gadgets
- X, CNOT, Toffoli, and Fredkin are involutions
- Finite registers and their ordered computational bases
- Big-endian encoding of ordered bit strings
- Big-endian bit-string indices are bijective
- Ordered tensor registers, their inner product, and wire permutations
- Tensor products of finitely many linear maps
- CNOT and Control-Target Order
- The computational basis is orthonormal
- The product basis is orthonormal and tensor dimensions multiply
Used by
Dependency tree · two levels
42 results within two dependency steps of this one, each drawn at its shortest distance from it. An arrow runs from a result to what uses it, so the chart reads left to right and ends at this result, which carries a heavier outline. Every node is a link to that result. Click elsewhere on the chart to enlarge it.
Sources
- John Preskill, Quantum Computation, Chapter 5: Classical and Quantum Circuits (updated July 2015) (standard reference, not scraped)
- Ronald de Wolf, Quantum Computing: Lecture Notes, arXiv:1907.09415v6 (standard reference, not scraped)