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Reversible Computation, Ancillas, and Coherent Oracles

1 · Prerequisites

2 · Summary

This page develops reversible Boolean computation with explicit finite circuits and ordered input, work, and target registers. It defines clean and dirty ancilla contracts, Toffoli and Fredkin actions, the compute-copy-uncompute procedure, and a coherent XOR function oracle. The local results prove gate identities, coherent correctness, workspace restoration, and gate/work/depth costs. Oracle invocations, explicit circuit compilation, and controlled access remain distinct resource assumptions.

3 · Logical flowchart

4 · Definitions, theorems and proofs

DefinitionDefinition: Literature-sourcedProof: Not applicableOpen item page →

Clean and dirty ancillas

Definition

Let D be a finite ordered quantum register and let A be an ordered register of k≥0 ancilla qubits, with Hilbert spaces HD and HA. Write ∣0A⟩=∣0k⟩, including ∣0A⟩=1 when k=0. Let U be a unitary on HD⊗HA and let V be a unitary on HD.

The register A is a clean ancilla register for U and V when

U(∣ψ⟩D⊗∣0A⟩)=V∣ψ⟩D⊗∣0A⟩

for every vector ∣ψ⟩D. Thus the data operation is independent of the input vector and all clean wires return exactly to zero.

The register A is a dirty ancilla register for U and V when the operator identity U=V⊗IA holds on HD⊗HA. Equivalently, every product input ∣ψ⟩D⊗∣η⟩A is mapped to V∣ψ⟩D⊗∣η⟩A, with the same V for every data and ancilla vector. This requires exact restoration of an arbitrary, initially unknown ancilla state and forbids residual data–ancilla correlation.

These are exact contracts for the complete subroutine. A temporary intermediate alteration of an ancilla is permitted if the full unitary satisfies the stated identity.

Remarks

The reference-register and arbitrary-matrix consequences are proved in Clean and dirty ancilla identities extend to references and mixed states.

DefinitionDefinition: Literature-sourcedProof: Not applicableOpen item page →

Toffoli and Fredkin gates

Definition

All bits are in F2={0,1}, with addition denoted by ⊕ and multiplication by juxtaposition. On three distinct ordered computational-basis wires, define the Toffoli gate T and Fredkin gate F by

T∣a,b,t⟩=∣a,b,t⊕ab⟩,

and

F∣0,a,b⟩=∣0,a,b⟩,F∣1,a,b⟩=∣1,b,a⟩.

These basis actions extend linearly. Wire order is exactly the order displayed; the first two wires of T are controls and the third is its target, while the first wire of F is its control and the other two are conditionally swapped. Negative-control variants mean conjugating the chosen positive control by X before and after the gate. These are fixed arity-three labels in the declared finite gate alphabet, not implicit access to arbitrary multicontrol gates. Their reversibility is established in X, CNOT, Toffoli, and Fredkin are involutions ↗.

LemmaStatement: Literature-sourcedProof: AI-generatedprecheck passjudge pass (gpt-6-luna)Open item page →

Clean and dirty ancilla identities extend to references and mixed states

Statement

Let U and V satisfy either the clean or dirty identity in Clean and dirty ancillas, and let R be any finite ordered reference register. Put P0=R0A,0A, where the rank-one operator notation used here is defined by Ru,v(z)=⟨z,v⟩rootu. In the clean case, for every matrix X on R⊗D,

(IR⊗U)(X⊗P0)(IR⊗U†)=((IR⊗V)X(IR⊗V†))⊗P0.

In the dirty case, for every matrix Y on R⊗D⊗A,

(IR⊗U)Y(IR⊗U†)=(IR⊗V⊗IA)Y(IR⊗V†⊗IA).

Thus the stated identities apply in particular to density matrices, meaning positive semidefinite matrices of trace one.

Facts & Assumptions

Given: Finite-dimensional registers R,D,A, ordered so the operation acts on D⊗A and as the identity on R. Prove the stated extension in the clean and dirty cases.

[F1]

Clean and dirty ancillas: In the clean case, U(∣ψ⟩D⊗∣0A⟩)=V∣ψ⟩D⊗∣0A⟩ for every ∣ψ⟩D. In the dirty case, U=V⊗IA.

[F2]

Tensor products of finitely many linear maps: For a finite ordered family of linear maps, the tensor map is the unique linear map whose action on each elementary tensor is the tensor of the factor-map actions.

[F3]

Ordered tensor registers, their inner product, and wire permutations: The tensor inner product on elementary tensors is the product of the factor inner products, with the displayed register order retained.

[F4]

The product basis is orthonormal and tensor dimensions multiply: For finite ordered registers with specified orthonormal factor bases, the lexicographically ordered elementary tensors form an orthonormal basis and therefore span the product register.

Proof

1.1givenF1F2F4algebra

In the clean case, for every w∈HR⊗HD, write w as a finite sum of elementary tensors. The clean identity in [F1] and the tensor-map rule [F2] give (IR⊗U)(w⊗∣0A⟩)=((IR⊗V)w)⊗∣0A⟩.

2.1step 1.1F2F3F4algebra

For any linear map A with adjoint and vectors u,v, conjugate symmetry and the defining adjoint relation give ⟨A†q,v⟩root=⟨v,A†q⟩root‾=⟨Av,q⟩root‾=⟨q,Av⟩root for every q. Hence ARu,vA†=RAu,Av. By [F3], Rw,z⊗P0=Rw⊗∣0A⟩,z⊗∣0A⟩. Apply the rank-one identity with A=IR⊗U, u=ei⊗∣0A⟩, and v=ej⊗∣0A⟩, where ei,ej range over the product orthonormal basis of R⊗D. Step 1.1 gives the clean conjugation formula for each Rei,ej⊗P0. Every matrix X on R⊗D equals ∑i,j⟨Xej,ei⟩rootRei,ej, since the right side agrees with X on each basis vector; hence these matrix units span and linearity proves the clean identity for every X.

3.1givenF1F2F3F4algebra∎

In the dirty case, [F1] and [F2] give IR⊗U=IR⊗V⊗IA on every elementary tensor and hence on the whole product space. The product inner product [F3] makes its adjoint IR⊗V†⊗IA: this follows first on elementary tensors from the defining adjoint relation for V, then on all vectors because they span by [F4]. Substitution yields the dirty identity for every matrix Y, including every density matrix; for a product Y=ZRD⊗SA, the output is ((IR⊗V)ZRD(IR⊗V†))⊗SA, so the dirty factor remains unchanged and uncorrelated in this product case.

LemmaStatement: Literature-sourcedProof: AI-generatedprecheck passjudge pass (gpt-6-luna)Open item page →

X, CNOT, Toffoli, and Fredkin are involutions

Statement

On the ordered computational basis, X, CNOT, Toffoli T, and Fredkin F are involutions. Their linear extensions are unitary. With chronological order meaning the gates are applied in the written order, Fredkin is implemented by CNOT(a,b), then T(c,b,a), then CNOT(a,b).

Facts & Assumptions

Given: The displayed gate actions and the ordered tensor-product computational basis. Prove involutivity, unitarity, and the stated Fredkin implementation.

[F5]

The Pauli matrices: In the ordered computational basis, X=(0110).

[F1]

CNOT and Control-Target Order: In the ordered two-qubit basis, CNOT⁡1→2∣a,t⟩=∣a,t⊕a⟩.

[F2]

Toffoli and Fredkin gates: T∣a,b,t⟩=∣a,b,t⊕ab⟩; F∣0,a,b⟩=∣0,a,b⟩ and F∣1,a,b⟩=∣1,b,a⟩.

[F3]

The computational basis is orthonormal: For every d≥1, the ordered computational basis of Qd is an orthonormal basis for its declared inner product.

[F4]

The product basis is orthonormal and tensor dimensions multiply: The elementary tensors of specified ordered orthonormal factor bases, in lexicographic order, form an orthonormal basis of the tensor register.

[F6]

Denotational semantics of a finite layered circuit: A chronological list of layers L1,…,Ld, with L1 applied first, denotes ULd⋯UL1.

Proof

1.1givenF5algebra

The matrix in [F5] sends ∣t⟩ to ∣t⊕1⟩. Applying it twice sends t to t⊕1⊕1=t, so X2=I.

1.2givenF1algebra

By [F1], applying CNOT twice sends ∣a,t⟩ to ∣a,t⊕a⊕a⟩=∣a,t⟩, so CNOT⁡2=I.

1.3givenF2algebra

Applying T twice leaves a,b unchanged and sends t to t⊕ab⊕ab=t. Thus T2=I.

1.4givenF2choose

When the Fredkin control is 0, each application fixes (a,b). When it is 1, each application swaps a,b and leaves the control unchanged. In either case two applications restore all three bits, so F2=I.

2.1step 1.1step 1.2step 1.3step 1.4F1F2F3F4F5algebra

The four maps permute the ordered orthonormal computational basis by [F1]–[F5]. A permutation of an orthonormal basis preserves inner products, so each linear extension is unitary; by Steps 1.1–1.4 each is its own inverse.

3.1givenF1F2F6choosealgebra∎

Apply the gates chronologically as prescribed by [F6] to ∣c,a,b⟩. After CNOT(a,b) the last two bits are (a,b⊕a). If c=0, Toffoli does nothing and the last CNOT restores (a,b). If c=1, Toffoli changes its target to a⊕(b⊕a)=b, and the last CNOT changes the other bit to (b⊕a)⊕b=a. Thus the output is ∣c,a,b⟩ for c=0 and ∣c,b,a⟩ for c=1, exactly the Fredkin action.

AlgorithmAlgorithm: Literature-sourcedProof: Not applicableOpen item page →

Reversible embedding of a Boolean circuit

Definition

Inputs are integers n,m≥0, n distinct ordered Boolean input wires, an m-bit target register y disjoint from the input wires, and a finite Boolean DAG with an explicit topological order and an ordered list of exactly m output ports. Every vertex has a unique identifier; each non-input node is a constant 0 or 1, a NOT node of fan-in one, or an AND or OR node of fan-in two. Each source reference must name an input vertex or an earlier node in the supplied order. Each output port may name any input or non-input node, and repeated output ports are allowed. The Boolean graph uses the NOT/AND/OR basis with constants from Boolean circuits: basis, fan-in, size, and depth, extended here to multiple ordered output ports sharing one graph.

Return INVALID if the input wires or graph vertices do not have distinct identifiers, a target wire overlaps an input or graph vertex, an unsupported gate or incorrect fan-in occurs, a source reference is unavailable at that position, the supplied order is invalid, or an output port names no available vertex. Otherwise:

  1. Allocate one fresh clean value bit wv for each non-input node v.
  2. Process nodes in the supplied order. Leave a constant-0 bit untouched; apply X to a constant-1 bit. For a NOT node with input wire u, apply X(wv) then CNOT⁡u→wv. For an AND node with inputs u,v, apply T(u,v,wv). For an OR node, apply CNOT⁡u→wv, then CNOT⁡v→wv, then T(u,v,wv). If a two-port node uses the same source identifier twice, first allocate a fresh clean scratch bit s, copy the source into s by CNOT, use the distinct physical wires as the gate inputs, and uncopy s immediately after writing wv.
  3. For each output port j, apply CNOT from its named input or value wire to target bit yj.
  4. Append the inverse of the entire node-evaluation list in reverse chronological order, including the temporary source-copy and uncopy instructions. Return the resulting finite gate list, with the input register unchanged and the target changed only by the stated XOR into y.

The inverse-list operation is defined instruction by instruction: X, CNOT, and Toffoli are each replaced by themselves, in reverse order. The Boolean graph is an explicit finite input; this procedure makes no uniform-generation, oracle, or Turing-time claim.

LemmaStatement: Literature-sourcedProof: AI-generatedprecheck passjudge pass (gpt-6-luna)Open item page →

Fresh-target NOT and OR gadgets

Statement

Let a,b be distinct source wires and let t be a distinct target wire initialized to 0. The chronological sequence X(t) followed by CNOT⁡a→t writes 1⊕a into t. The sequence CNOT⁡a→t, CNOT⁡b→t, T(a,b,t) writes a∨b into t, since a∨b=a⊕b⊕ab. Every source wire is unchanged.

Facts & Assumptions

Given: Distinct source and target wires and the stated Pauli-X, CNOT, and Toffoli actions on the ordered computational basis. Verify the target values and preservation of controls.

[F1]

The Pauli matrices: In the ordered computational basis, X=(0110), which sends ∣t⟩ to ∣t⊕1⟩ by matrix multiplication.

[F2]

CNOT and Control-Target Order: In the ordered two-qubit basis, CNOT⁡1→2∣a,t⟩=∣a,t⊕a⟩.

[F3]

Toffoli and Fredkin gates: T∣a,b,t⟩=∣a,b,t⊕ab⟩.

[F4]

Denotational semantics of a finite layered circuit: A chronological list of layers L1,…,Ld, with L1 applied first, denotes ULd⋯UL1.

[F5]

X, CNOT, Toffoli, and Fredkin are involutions: X, CNOT, and Toffoli are unitary gates on their ordered registers.

Proof

1.1givenF1F2F4F5algebra

Starting with t=0, X(t) sets it to 1 and the following CNOT changes it to 1⊕a. Both gates target only t, so a is unchanged; [F5] supplies their gate unitarity.

2.1givenF2F3F4F5choosealgebra∎

For the second sequence, the final target is 0⊕a⊕b⊕ab. For (a,b)=(0,0),(0,1),(1,0),(1,1) these values are 0,1,1,1, respectively, which are exactly a∨b. The two CNOTs and Toffoli have controls only on a,b, so neither source changes; [F5] supplies their gate unitarity.

LemmaStatement: Literature-sourcedProof: AI-generatedprecheck passjudge pass (gpt-6-luna)Open item page →

Toffoli computes into a clean target and uncomputes it

Statement

Let a,b be the values on two distinct control wires, let t be a distinct clean target wire with value 0, and let y be another distinct target wire with arbitrary value. Toffoli changes t to ab while preserving the controls. Copying that value into y by CNOT and applying Toffoli again, in the written chronological order, sends

∣a,b,y,0⟩⟼∣a,b,y⊕ab,0⟩.

The same operator identity holds on superpositions.

Facts & Assumptions

Given: The Toffoli action, a zero-initialized workspace bit, and a distinct arbitrary target bit. Prove the stated compute-copy-uncompute identity.

[F1]

Toffoli and Fredkin gates: Toffoli maps ∣a,b,t⟩ to ∣a,b,t⊕ab⟩.

[F2]
[F3]

Clean and dirty ancillas: A clean ancilla is initialized in ∣0⟩ and the complete subroutine must return it exactly to ∣0⟩.

[F4]

CNOT and Control-Target Order: In the ordered two-qubit basis, CNOT⁡1→2∣a,t⟩=∣a,t⊕a⟩.

[F5]

Denotational semantics of a finite layered circuit: A chronological list of layers L1,…,Ld, with L1 applied first, denotes ULd⋯UL1.

[F6]

Tensor products of finitely many linear maps: A tensor map extends its factor maps linearly and acts factorwise on each elementary tensor.

[F7]

The computational basis is orthonormal: The one-qubit computational basis is an orthonormal basis for its declared inner product.

[F8]

The product basis is orthonormal and tensor dimensions multiply: The ordered tensor product of finite orthonormal factor bases is an orthonormal basis of the register.

Proof

1.1givenF1F3algebra

Since t=0, Toffoli sets t to 0⊕ab=ab. The four control cases 00,01,10,11 give target values 0,0,0,1, respectively, and the controls are unchanged.

2.1givenF1F2F4F5step 1.1algebra

CNOT from this work bit to the disjoint target changes y to y⊕ab and leaves a,b,t otherwise unchanged. The final Toffoli toggles t by the same ab, returning it to ab⊕ab=0; by [F2] it is the inverse compute gate. Thus each basis input has the stated output and clean work.

3.1step 2.1F5F6F7F8algebra∎

The vectors ∣a,b,y,0⟩, as (a,b,y) ranges over its eight values, form a basis of the input subspace with the work factor fixed to ∣0⟩, by [F7]–[F8]. Every gate is linear, so the basis-vector identity in Step 2.1 extends to every superposition in that subspace. The tensor-map rule [F6] makes each gate act factorwise on the ordered wires, preserving the displayed register order.

TheoremStatement: Literature-sourcedProof: AI-generatedprecheck passjudge pass (gpt-6-luna)Open item page →

Compute-copy-uncompute restores clean workspace

Statement

Let C be a unitary circuit on input register X and clean work register W, with an available circuit for C−1. Suppose that for every x∈{0,1}n,

C∣x,0W⟩=∣x,g(x),r(x)⟩,

where g(x) occupies a designated m-bit subregister of W and r(x) is any remaining work string. Copying g(x) into a distinct arbitrary target register Y by bitwise CNOT and then applying C−1 to XW maps

∣x,y,0W⟩⟼∣x,y⊕g(x),0W⟩.

The identity holds coherently on superpositions and with any reference register.

Facts & Assumptions

Given: The stated basis action of C, disjoint target register Y, and available inverse circuit. Prove that the work is restored.

[F1]

Clean and dirty ancillas: Clean workspace is initialized to the all-zero vector and must be returned exactly to that factor.

[F2]

Clean and dirty ancilla identities extend to references and mixed states: Clean identities extend to reference registers by tensoring with identity and to arbitrary matrices by linearity.

[F3]

CNOT and Control-Target Order: In the ordered two-qubit basis, CNOT⁡1→2∣a,t⟩=∣a,t⊕a⟩.

[F4]

Tensor products of finitely many linear maps: The tensor map acts factorwise on elementary tensors and extends uniquely by linearity.

[F5]

Denotational semantics of a finite layered circuit: Chronological layers L1,…,Ld, with L1 applied first, denote the ordered product ULd⋯UL1.

[F6]

Reversing a circuit implements its inverse: If the inverses of all gates are explicitly available, reversing the chronological gate order and adjointing each gate implements C†=C−1.

[F7]

Finite registers and their ordered computational bases: An n-qubit register is the ordered tensor product of n copies of Q2, with the first wire most significant; the empty register is C with basis {1}.

[F8]

Big-endian encoding of ordered bit strings: A bit string occupies the computational-basis slot given by its big-endian index.

[F9]

Big-endian bit-string indices are bijective: Every length-n bit string labels exactly one computational-basis vector.

[F10]

The computational basis is orthonormal: The computational basis of each nonempty qubit register is orthonormal.

[F11]

The product basis is orthonormal and tensor dimensions multiply: Ordered product bases of finite registers form a basis of their tensor product, including the empty-register case.

[F12]

X, CNOT, Toffoli, and Fredkin are involutions: CNOT is a unitary gate on its ordered register.

Proof

1.1givenF3F5F12algebra

On a basis input, the forward computation gives ∣x,g(x),r(x)⟩. Since Y is disjoint, bitwise CNOT from the designated g(x) subregister changes an arbitrary target y to y⊕g(x) and leaves XW unchanged. The intermediate state is therefore ∣x,y⊕g(x),g(x),r(x)⟩, with g(x),r(x) together occupying W; [F12] supplies the CNOT gate unitarity.

2.1givenF1F5F6step 1.1algebra

Applying C−1 to XW returns ∣x,g(x),r(x)⟩ to ∣x,0W⟩ by the assumed forward basis action and [F6]. The inverse is supplied on XW by the Given clause, so the disjoint target Y is untouched and remains y⊕g(x). This proves the displayed basis action and exact restoration of all work required by the clean-ancilla contract [F1].

3.1step 2.1F1F2F4F5F7F8F9F10F11algebra∎

By [F7]–[F11], the ordered basis vectors ∣x,y,0W⟩ form a basis of the subspace with work fixed to zero. Step 2.1 therefore extends by linearity to every superposition in that subspace, with data action V∣x,y⟩=∣x,y⊕g(x)⟩. This data map is an involutive permutation of its orthonormal computational basis, since applying it twice restores y; hence V is unitary. The complete compute-copy-inverse operation thus satisfies the clean identity in [F1], and [F2] extends it to every finite reference register and matrix. The tensor-map and chronological-circuit conventions [F4]–[F5] preserve the ordered factors in these extensions.

TheoremStatement: Literature-sourcedProof: AI-generatedprecheck passOpen item page →

Gate, workspace, and serial-depth costs of reversible embedding

Statement

Let n,m≥0, x∈{0,1}n, and y∈{0,1}m. Let a finite topologically ordered Boolean DAG have S non-input nodes, including constants, and E input-port uses counted with multiplicity. Its gates are NOT, AND, OR, and constants, with fan-in at most two, and it has m ordered output ports computing f(x). Under the fixed elementary alphabet in Finite circuit resource accounting, counting each occurrence of X, CNOT, and Toffoli as one gate and one serial layer, Reversible embedding of a Boolean circuit returns a circuit on the ordered input, target, and work registers implementing

∣x,y,0w⟩⟼∣x,y⊕f(x),0w⟩

for every basis input x and every target string y. It uses at most 6S+4E+m elementary gate occurrences, at most S+E clean work bits, and serial depth at most 6S+4E+m. The same operator action holds coherently on arbitrary superpositions and after adjoining any finite reference register.

Facts & Assumptions

Given: The finite Boolean DAG convention, the procedure in Reversible embedding of a Boolean circuit, and the gate actions in the local suppliers. Prove correctness, clean-work restoration, and the stated bounds.

[F1]

Boolean circuits: basis, fan-in, size, and depth: A Boolean circuit has constants 0 and 1, and NOT, AND, and OR gates; AND and OR have fan-in two, while NOT has fan-in one. Its size is its number of non-input gates.

[F2]

Reversible embedding of a Boolean circuit: The procedure computes each gate into fresh zero work, copies the designated outputs into arbitrary targets, and reverses the node-evaluation list.

[F3]

Fresh-target NOT and OR gadgets: The fresh-target sequences write 1⊕a for NOT and a⊕b⊕ab=a∨b for OR without changing sources.

[F4]

Toffoli computes into a clean target and uncomputes it: Toffoli computes ab into a clean target, and copying followed by the inverse Toffoli restores that target to zero.

[F5]

Clean and dirty ancilla identities extend to references and mixed states: Clean workspace identities extend to arbitrary references and matrices.

[F6]

X, CNOT, Toffoli, and Fredkin are involutions: X, CNOT, and Toffoli are each their own inverse.

[F8]

The Pauli matrices: The Pauli matrix X=(0110) sends ∣0⟩ to ∣1⟩ and ∣1⟩ to ∣0⟩.

[F7]

Ordered tensor registers, their inner product, and wire permutations: An ordered tensor register retains the displayed factor order, and its product basis is ordered lexicographically by factor-index tuples.

[F9]

Big-endian encoding of ordered bit strings: The first bit is the most significant position in the computational-basis index.

[F10]

Big-endian bit-string indices are bijective: Each length-n bit string labels exactly one computational-basis vector of the n-qubit register.

[F11]

Denotational semantics of a finite layered circuit: A chronological list of layers L1,…,Ld, with L1 applied first, denotes ULd⋯UL1.

[F12]

The product basis is orthonormal and tensor dimensions multiply: The ordered tensor-product computational basis is orthonormal, including the work-register factors.

[F13]

Finite circuit resource accounting: Circuit size counts gate occurrences, depth counts explicit layers, and width counts all wires including workspace wires.

Proof

1.1givenF1F2F3F4F13algebra

Let q be the number of two-port nodes whose two ports name the same source. Each non-input node uses at most three evaluation gates: at most one for a constant, two for NOT, one for AND, and three for OR. Each repeated-source node adds one CNOT copy and one uncopy, so the forward pass uses at most 3S+2q gates. Since each such node accounts for two of the E port uses, q≤E, and the forward bound is at most 3S+2E. It uses S value bits and q≤E temporary bits.

2.1givenF2F4F6F11F13step 1.1algebra

The m output ports are copied by m CNOTs into distinct target bits. Reversing the complete node-evaluation list uses at most another 3S+2E gates. By [F6], each gate is its own inverse; reversing both order and gate sequence therefore implements the inverse computation and returns every value and temporary bit to zero. The total is at most 2(3S+2E)+m=6S+4E+m gate occurrences. A serial execution assigns each occurrence its own explicit layer, so the depth has the same bound by [F13]; [F11] specifies the chronological operator product.

3.1givenF1F2F3F4F6F7F8F9F10F11F12step 2.1inductionalgebra

Use [F9]–[F10] to identify each ordered bit string with its unique basis vector. Induct along the supplied topological order. A constant-0 node leaves its zero bit unchanged and a constant-1 node uses [F8]; NOT and OR nodes receive the outputs in [F3], and AND nodes receive the output in [F4]. If a two-port node repeats a source value c, its fresh scratch bit is set to c by CNOT; the two distinct physical control wires then both hold c, so AND gives c∧c=c and OR gives c∨c=c. The scratch is immediately uncomputed by the same CNOT. Thus every value bit equals its Boolean node value and all temporary bits are zero before the output copy. The m output CNOTs produce y⊕f(x); reversing the node list then restores every work bit without touching the input or target registers, whose order is fixed by [F7]. Since applying y↦y⊕f(x) twice returns y, the target action is a permutation of the ordered basis and is unitary by [F12]; the compiled gate list is unitary by [F6] and [F11].

4.1step 3.1F5algebra∎

The basis identity in Step 3.1 extends by linearity to every input vector, so it is the clean-ancilla identity required by [F5]. The lemma then extends it to every finite reference register and every matrix, hence to density matrices. The construction uses only the supplied finite list; no choice principle is used.

DefinitionDefinition: Literature-sourcedProof: Not applicableOpen item page →

Coherent XOR function oracle

Definition

Let n,m≥0 and let f:{0,1}n→{0,1}m be a total Boolean function on ordered bit strings. Its coherent XOR oracle is the linear extension of

Of∣x,y⟩=∣x,y⊕f(x)⟩

on the ordered input and target computational basis, where XOR is componentwise. The declared access contract states how many invocations count as queries and whether a controlled invocation is supplied. A query to this declared black box is counted separately from elementary gate size, depth, and width.

If f is supplied instead by an explicit Boolean circuit, implementing Of means compiling that circuit and paying its reversible elementary-gate and workspace costs; the function description alone is not a free query. For this XOR oracle, its inverse is the same map, as proved in A total Boolean XOR oracle is unitary and involutive ↗. Controlled access remains a separate capability unless the contract explicitly provides it.

TheoremStatement: Literature-sourcedProof: AI-generatedprecheck passOpen item page →

Parallel depth of reversible Boolean embedding

Statement

For a finite Boolean DAG over constants, NOT, AND, and OR, with fan-in at most two, let S be its number of non-input nodes, E its number of input-port uses counted with multiplicity, and m its number of ordered output ports. Let D be the number of nonempty layers obtained by grouping each non-input node according to the maximum number of non-input vertices on a path ending at that node. Let F be the maximum number of input-port occurrences from one source wire into gates in one such layer, with F=0 if there are no gate input ports. There is a layer-respecting reversible circuit implementing the same XOR embedding as Reversible embedding of a Boolean circuit with O(S+E+m) gate occurrences and O(S+E+m) work bits. Let

L=⌈log⁡2(F+1)⌉,Lm=⌈log⁡2(m+1)⌉.

Its depth is at most

2D(2L+3)+2Lm+1.

The bound permits coherent fan-out of computational-basis labels by CNOT trees and does not assert arbitrary-state cloning or constant-factor preservation of Boolean-DAG depth. For bounded fan-in, E≤2S.

Facts & Assumptions

Given: The reversible embedding construction, finite gate/depth conventions, and disjoint ordered registers. Prove the scheduling and resource bound.

[F1]

Gate, workspace, and serial-depth costs of reversible embedding: The compute-copy-reverse construction implements the XOR embedding and restores clean work.

[F10]

Finite circuit resource accounting: Size counts gate occurrences, depth counts explicit layers, and width counts all wires including workspace wires.

[F9]

Denotational semantics of a finite layered circuit: Chronological layers L1,…,Ld, with L1 applied first, denote ULd⋯UL1; disjoint gates in a layer are interpreted as parallel.

[F2]

Ordered tensor registers, their inner product, and wire permutations: An ordered tensor register retains the displayed factor order, and its product basis is ordered lexicographically by factor-index tuples.

[F3]

Tensor products of finitely many linear maps: The tensor map of a finite family of linear maps acts on each elementary tensor by applying the corresponding map to each factor.

[F4]

CNOT and Control-Target Order: In the ordered two-qubit basis, CNOT⁡1→2∣a,t⟩=∣a,t⊕a⟩.

[F5]

The Pauli matrices: The Pauli matrix X flips a computational-basis bit.

[F6]

Toffoli and Fredkin gates: Toffoli maps ∣a,b,t⟩ to ∣a,b,t⊕ab⟩ and preserves its two controls.

[F7]

Fresh-target NOT and OR gadgets: NOT and OR are computed into a distinct zero target by the stated two- and three-gate gadgets, with source wires preserved.

[F8]

X, CNOT, Toffoli, and Fredkin are involutions: X, CNOT, and Toffoli are each their own inverse and unitary on their ordered registers.

[F11]

The computational basis is orthonormal: Each one-qubit computational basis is an orthonormal basis for its declared inner product.

[F12]

The product basis is orthonormal and tensor dimensions multiply: Ordered tensor products of finite orthonormal factor bases form an orthonormal basis, including empty registers.

[F13]

Big-endian encoding of ordered bit strings: Ordered bit strings label computational-basis slots by their big-endian indices.

[F14]

Big-endian bit-string indices are bijective: Every length-n bit string labels exactly one computational-basis vector, including the empty string.

Proof

1.1givenF2F3F4F9F10choosealgebra

For a source wire used r≥1 times in one DAG layer, start with that wire as one leaf and in each round apply CNOT from each current leaf to at most one fresh zero target. After j rounds there are at least min⁡(r,2j) distinct leaves, so at most ⌈log⁡2(r+1)⌉≤L rounds suffice. The tree needs r−1 CNOTs, and summing r−1 over source wires and layers gives at most E copies. By [F4], each leaf carries the source's basis value and each CNOT leaves its control unchanged. The rounds are successive explicit layers in the order specified by [F9], counted by [F10].

2.1givenF2F3F4F5F6F7F8F9F10step 1.1algebra

Fix a DAG layer and suppose each source wire at its start holds its Boolean circuit value. Fan out every source to private leaves by Step 1.1. Each non-input node has a distinct fresh zero value bit. A constant-0 node leaves that bit unchanged, and a constant-1 node flips it by [F5]. For NOT, the two sublayers in [F7] write 1⊕a; for AND, [F6] writes ab; for OR, [F7] writes a⊕b⊕ab=a∨b. Repeated logical sources have distinct physical leaves, and every gate preserves its leaves. Targets are distinct between nodes, so each of these at most three gate sublayers has disjoint supports. Reversing the fan-out trees restores all private leaves to zero, since the evaluation gates did not change them; [F8] supplies the inverse CNOTs. By [F9] these are chronological sublayers, and [F10] counts them. The layer therefore takes at most L+3+L=2L+3 depth.

3.1givenstep 2.1inductionalgebra

If a non-input node u feeds a node v, every longest path ending at u extends by that edge, so the layer index of u is strictly smaller than the layer index of v. Induct on the layer index. At the first layer all non-input predecessors are absent; at a later layer every non-input predecessor has its correct value by induction. Step 2.1 then writes the Boolean value of each node in the current layer and clears its temporary leaves. Thus after all D layers every value bit equals its node's Boolean evaluation, including when two ports use the same source, and all fan-out leaves are zero.

4.1givenF2F3F4F9F10step 1.1step 3.1algebra

For each output source selected r times, use Step 1.1 to produce r private leaves in at most Lm rounds. Copy each leaf into its distinct target bit in one layer, then reverse the tree in at most Lm rounds. Summing r−1 over output sources gives at most m temporary targets, and the output stage has depth at most 2Lm+1. This also covers repeated output ports and output sources that are input wires. The chronological composition is the one in [F9], and [F10] counts the explicit layers.

5.1givenF1F5F6F7F8F9F10F11F12F13F14step 2.1step 3.1step 4.1algebra∎

Copy each output into its target, then reverse the layer computations. In reverse order the fan-out tree is first recreated, the node gates are inverted to clear their value bits, and the fan-out tree is then undone; [F8] makes these same CNOT, X, and Toffoli gates available as inverses. This costs at most another D(2L+3) depth and returns every value bit and temporary copy to zero. Adding this reverse depth, the output stage from Step 4.1, and the forward depth from Steps 2.1–3.1 gives 2D(2L+3)+2Lm+1. There are S value bits, at most E temporary input-copy bits, and at most m output-copy bits, for O(S+E+m) work. The input-copy trees and their reversals in both computation passes use at most 4E CNOTs, and the output-copy trees and their reversals use at most 2m CNOTs, output copying uses m CNOTs, and Boolean evaluation and reversal use at most 6S gates, hence the total is O(S+E+m). Since fan-in is at most two, E≤2S. By Step 3.1 each output source holds its Boolean value, so Step 4.1 changes the target to y⊕f(x); reversing node computations restores the work without changing the input or target. This is the XOR embedding specified by [F1]. By [F11]–[F14], ordered bit strings identify the complete computational basis of the input, target, and work registers, including the zero-qubit case; the basis identity therefore extends by linearity to superpositions. The finite circuit denotes the chronological operator product [F9], its resource coordinates are counted by [F10], and fan-out CNOTs may entangle copies during computation, but reversing them restores each copy bit to zero, so no arbitrary unknown state is cloned.

TheoremStatement: Literature-sourcedProof: AI-generatedprecheck passjudge pass (gpt-6-luna)Open item page →

A total Boolean XOR oracle is unitary and involutive

Statement

For every total Boolean function f:{0,1}n→{0,1}m, including noninjective functions, the coherent XOR oracle Of∣x,y⟩=∣x,y⊕f(x)⟩ is unitary and satisfies Of2=I. Hence Of−1=Of.

Facts & Assumptions

Given: The basis action in Coherent XOR function oracle on the finite ordered computational basis. Prove involutivity and unitarity without assuming f injective.

[F1]

Coherent XOR function oracle: Of∣x,y⟩=∣x,y⊕f(x)⟩ for every ordered input and target string.

[F2]

Big-endian encoding of ordered bit strings: The big-endian index is enc⁡n(x)=∑k<nxk2n−1−k, and the word x occupies the basis slot numbered by that index.

[F3]

Finite registers and their ordered computational bases: The n-qubit register is the ordered tensor product of n copies of Q2, with tuples in lexicographic order and the first wire most significant; for n=0 it is C with basis {1}.

[F4]

The computational basis is orthonormal: The ordered computational basis of each Qd register is an orthonormal basis for its declared inner product.

[F5]

Big-endian bit-string indices are bijective: For every n≥0, enc⁡n is a bijection from {0,1}n to {0,…,2n−1}.

[F6]

The product basis is orthonormal and tensor dimensions multiply: The lexicographically ordered elementary tensors of the factor bases form an orthonormal basis of the tensor register.

Proof

1.1givenF1algebra

Apply Of twice to a basis vector. The first application gives ∣x,y⊕f(x)⟩; the second gives ∣x,(y⊕f(x))⊕f(x)⟩=∣x,y⟩ because every bit added modulo two twice is zero. The input x is preserved throughout, so injectivity of f is not needed.

2.1F1F2F3F4F5F6step 1.1algebra∎

By [F2]–[F6], the input and target strings label the entire finite orthonormal product basis in the declared order. Step 1.1 shows that the oracle map is a permutation of this basis, so its matrix has orthonormal columns and satisfies Of†Of=I. Therefore it is unitary, and Step 1.1 gives its inverse as itself.

TheoremStatement: Literature-sourcedProof: AI-generatedprecheck passjudge pass (gpt-6-luna)Open item page →

Phase kickback from an XOR oracle

Statement

Let f:{0,1}n→{0,1}m be total, let s∈{0,1}m, and define the normalized character target

∣χs⟩=2−m/2∑y∈{0,1}m(−1)s⋅y∣y⟩,

where s⋅y is the dot product modulo two. Then

Of(∣x⟩∣χs⟩)=(−1)s⋅f(x)∣x⟩∣χs⟩.

For a one-bit output with s=1, ∣χs⟩=∣−⟩=(∣0⟩−∣1⟩)/2=H∣1⟩. Thus the phase action is obtained with one invocation of the declared XOR oracle, with target preparation cost accounted separately.

Facts & Assumptions

Given: The coherent XOR action and ordered bit-string basis. Prove the character-target identity.

[F1]

Coherent XOR function oracle: Of∣x,y⟩=∣x,y⊕f(x)⟩.

[F2]

A total Boolean XOR oracle is unitary and involutive: The XOR oracle is a unitary involution for every total Boolean function.

[F3]

Finite registers and their ordered computational bases: The n-qubit register is the ordered tensor product of n copies of Q2, with tuples in lexicographic order and the first wire most significant; the empty register is C.

[F4]

The computational basis is orthonormal: The ordered computational basis of each Qd register is an orthonormal basis for its declared inner product.

[F5]

Big-endian bit-string indices are bijective: For every n≥0, the big-endian encoding is a bijection from the length-n bit strings to the 2n basis indices.

[F6]

The product basis is orthonormal and tensor dimensions multiply: Ordered product basis vectors form an orthonormal basis of the tensor register.

[F7]

Exact one-qubit gates and rotations: The exact Hadamard matrix is H:=X+Z2=12(111−1).

Proof

1.1givenF1F3F4F5F6algebra

By [F4]–[F6], the 2m target basis vectors are orthonormal and the encoding lists each exactly once; hence ∣χs⟩ has squared norm 2m2−m=1. Applying the oracle termwise gives 2−m/2∑y(−1)s⋅y∣x,y⊕f(x)⟩. Set z=y⊕f(x). Then y=z⊕f(x) and s⋅y=s⋅z⊕s⋅f(x), so the sum is (−1)s⋅f(x)∣x⟩∣χs⟩.

2.1step 1.1F2F3F4F5F6F7algebra∎

By [F3]–[F6], the ordered input basis spans its register, so linearity gives the same phase action on every superposition ∑xαx∣x⟩, with the target factor unchanged. When m=1 and s=1, multiplying the matrix in [F7] by ∣1⟩=(0,1)T gives H∣1⟩=(∣0⟩−∣1⟩)/2=∣−⟩. Also H∗H=12(111−1)(111−1)=I, so this is a unitary target preparation. The unitary character of the oracle is supplied by [F2].

TheoremStatement: Literature-sourcedProof: AI-generatedprecheck passOpen item page →

Oracle phase queries and compiled gate costs are distinct

Statement

An invocation counts as one oracle query only under an explicit oracle-access contract. A declared phase oracle therefore costs one phase query per invocation. A declared XOR oracle for a Boolean function f also implements its phase action in one XOR-oracle query by using target ∣−⟩, with the cost of preparing that target stated separately. If f is instead given by an explicit Boolean circuit, constructing its XOR or phase action incurs the compiled gate, depth, and workspace costs of Gate, workspace, and serial-depth costs of reversible embedding; it is not a free query. Controlled black-box access must be declared or constructed with its own cost. The XOR oracle is self-inverse, but an invocation used to apply that inverse still counts as one query.

Facts & Assumptions

Given: The explicit query-counting convention, the XOR-oracle contract, the phase-kickback identity, and the reversible compiler's gate bounds. Establish the query/gate distinction.

[F1]

Coherent XOR function oracle: Query count belongs to a declared black-box XOR-oracle contract; an explicit circuit implementation is a compiled gate list.

[F2]

Phase kickback from an XOR oracle: A Boolean XOR oracle applies the phase (−1)f(x) with target ∣−⟩ in one oracle invocation and returns that target unchanged.

[F3]

Gate, workspace, and serial-depth costs of reversible embedding: An explicit Boolean circuit can be compiled to a clean XOR embedding with its gate, depth, and work costs charged.

[F4]

A total Boolean XOR oracle is unitary and involutive: The XOR oracle is its own inverse.

[F5]

Controlled Unitary Access: Controlled access means the chosen operation model explicitly grants the block operator C(U); an ordinary black-box call to U does not grant it implicitly.

[F6]

Finite circuit resource accounting: The operation model records query costs separately from gate occurrences, depth layers, and classical bit costs.

Proof

1.1givenF1F2F6

A phase oracle for a Boolean function g means the diagonal map Pg∣x⟩=(−1)g(x)∣x⟩, and a declared query contract counts each invocation of its named black box as one query. Thus a declared phase-oracle invocation is one phase query. If the supplied black box is instead the XOR map, [F2] gives the same phase action using exactly one XOR-oracle invocation; target-state preparation is a separate ordinary circuit operation, charged in the separate coordinates of [F6].

2.1F1F3F4F5F6algebra∎

If the only input for f is an explicit Boolean circuit, [F3] replaces each required function evaluation by its finite compiled gate list, so the listed gates, depth, and work are charged under the separate resource coordinates [F6]. There is no black-box invocation to count unless the contract separately supplies one. Likewise a controlled black-box call requires declared controlled access [F5]; and although Of−1=Of by [F4], each call made to apply it remains one query invocation.

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