HHL cost under direct controlled-simulation access

Let $L={\log }_{2}T$, $t_j=2^j{t}_0\mathrm{/}T$, $K=\lceil 4\kappa \rceil$, and $R=\lceil 16\ln (1\mathrm{/}\rho )\rceil +16$. The capped HHL circuit uses at most $RK$ calls to each of $V$ and $V^{†}$, at most $RK$ calls to each supplied preparation form (the tagged $B_A$ in dilation mode) and its inverse, and one table construction $G_{\mathrm{\Psi }}(T,{ϵ}_{\mathrm{\Psi }})$. Each $V$ or $V^{†}$ contains two sine-table preparation/unpreparation circuits, one forward and one inverse QFT, the flag circuit, and $2L$ controlled simulation calls at signed times $\pm t_j$; its absolute evolution times sum to less than $2t_0$. Therefore the total absolute simulation time is less than $4RK{t}_0=O({\kappa }^2{ϵ}^{-1}(1+\log (1\mathrm{/}\rho )))$. More precisely, the simulation charge is the actual sum over all $V,V^{†}$ calls of ${\sum }_{j<L}(C_{\mathrm{s}\mathrm{i}\mathrm{m}}(t_j,{\eta }_j)+C_{\mathrm{s}\mathrm{i}\mathrm{m}}(-t_j,{\eta }_j))$. The remaining charge is $G_{\mathrm{\Psi }}(T,{ϵ}_{\mathrm{\Psi }})+n_V{C}_B+n_{V^{†}}{C}_{B^{†}}+2(n_V+n_{V^{†}})C_{\mathrm{\Psi }}(T,{ϵ}_{\mathrm{\Psi }})+(n_V+n_{V^{†}})(C_{\mathrm{Q}\mathrm{F}\mathrm{T}}^{+}(T)+C_{\mathrm{Q}\mathrm{F}\mathrm{T}}^{-}(T)+C_{\mathrm{f}\mathrm{l}\mathrm{a}\mathrm{g}}(\kappa ,{\eta }_R)+C_{\mathrm{a}\mathrm{r}\mathrm{i}\mathrm{t}\mathrm{h}}(T,\kappa ,ϵ))+N_{\mathrm{r}\mathrm{e}\mathrm{f}}{C}_{\mathrm{r}\mathrm{e}\mathrm{f}}+N_{\mathrm{v}\mathrm{e}\mathrm{r}}{C}_{\mathrm{v}\mathrm{e}\mathrm{r}},$ where $n_V,n_{V^{†}}\le RK$ and $N_{\mathrm{r}\mathrm{e}\mathrm{f}},N_{\mathrm{v}\mathrm{e}\mathrm{r}}$ are the actual reflection and verification counts. The table itself has $O(T\log (T\mathrm{/}{ϵ}_{\mathrm{\Psi }}))$ data bits and $T-1$ controlled rotations; no polylogarithmic table-generation or finite-rotation synthesis bound is asserted.