How statement and proof provenance work
The first chip identifies the source of the statement or construction; the second identifies the source of its local proof or verification.
- Literature-sourced: the exact statement appears in a cited source; only wording and notation differ.
- AI-adapted: a semantically identical restatement of literature-sourced material, modulo indexing, notation, and boundary cases adopted by the library.
- AI-generated: a genuinely novel statement formulated by AI, with no source for the claim itself.
These labels describe origin, not correctness: citations and verification chips remain separate evidence.
Bounded-error repetition amplification is correct and uniform
Statement
Assume the input family, rational threshold functions, gap polynomial, and clocks satisfy the valid-input conditions of Bounded-error repetition amplification. Assume also that the base acceptance satisfies for every length- YES input and for every length- NO input, where and . On every input in the YES promise set, the amplified acceptance probability is at least ; on every input in the NO promise set, it is at most . If and are the base gate count and total wire count, the repeated family has gate count and width . Its depth, complete-description length, generator time, and classical predicate time and space are polynomial in . Ordinary mode retains the exact original fixed gate library and full-list code. In oracle mode its ordinary gate count is , every port/variant count satisfies , and both raw query counts and charged query costs are multiplied by with the same granted access. Raw query counts are polynomial; charged query costs are polynomial whenever the base charged costs are polynomial. For a base clean or dirty interface whose declared ancillary register is disjoint from the first input wires, the input-copy stage acts only on data, and the corresponding exact contract is preserved with its declared register count multiplied by ; the extra input-copy wires remain in total width and are not counted as returned clean ancillas.
Facts & Assumptions
Given: An ordinary or oracle-aware finite promise computation in the corresponding mode of Bounded-error repetition amplification, with a fixed oracle instance in oracle mode, and acceptance probability satisfying on YES inputs and on NO inputs, rational thresholds , gap , target , and the procedure in Bounded-error repetition amplification.
Bounded-error repetition amplification: for , the procedure uses repetitions, copies only classical-basis input bits, and accepts iff .
Finite probability spaces, outcome weights, events, and event probabilities: probabilities on a finite space are nonnegative weights summing to one, and probabilities of events are finite sums of their outcome weights.
Chernoff bound for independent bernoulli trials: for mutually independent Bernoulli variables with sum and mean , for and .
The partial-output acceptance law is a finite probability law: for a finite promise computation, each run's output weights form a finite probability law and its acceptance event has probability .
Circuit-family and computation cost model: gate count, width, depth, description length, generator time, query count, and classical bit costs are separate coordinates.
A full-list uniform generator bounds circuit size and width: in ordinary mode a polynomial-time full-list generator emits polynomial description length, gate count, and total wire count. In oracle mode Oracle-aware full-list quantum circuit family requires a polynomial-time complete output with unary width and explicit ordinary/query records, and distinguishes , , , , and .
Clifford+T gate library and exact matrices: on computational-basis inputs, CNOT maps to with the first wire as control.
Finite circuit syntax and ordered wire labels uses distinct ordered gate wires and disjoint-support layers. Denotational semantics of a finite layered circuit embeds each local gate as its action on the named wires tensored with identity on the complement, and composes chronological layers with the later operator on the left. In oracle mode Oracle-aware full-list quantum circuit family supplies fixed unitary ports acting only on their listed wires, so their instantiated occurrences have these same semantics. Consequently gates confined to disjoint full blocks act factorwise on product-basis vectors; the terminal measurement probabilities used below are the finite coordinate sums in [F4].
Proof
Fix a promised input . For each input bit , the basis action of CNOT maps to ; applying this independently to each position produces exact copies of . This uses only a computational-basis input and asserts no cloning of arbitrary superpositions. By [F7], CNOT has the required basis action. The base circuits then act on disjoint full wire blocks, so by [A1] the prepared joint state is , where is the single-run output state. For any output strings , its joint probability is by finite distributivity and [F4]. Hence the measured output strings are mutually independent with the single-run law, and are independent Bernoulli variables with common parameter .
In ordinary mode [F6] bounds the base description length, operation count, and width polynomially. In oracle mode the same bounds follow directly from the explicit code: a machine started on input cells and run for transitions can print at most bits, each record occupies at least one bit, and the width is unary. The clocks and bit lengths of are polynomial, so is polynomial. In either mode the repeated circuit uses exactly operations and wires. Copying a record changes each wire index by a block offset with bits; the unary total-wire header has length , and the extra CNOT list has records. In oracle mode each original record's explicit list of wires is copied in full, its port/variant identifier is unchanged, and the entire descriptor table is copied once. Hence the complete repeated description has polynomial length and is produced in polynomial time by running the supplied machines, scanning and copying the base list, and adding offsets by binary arithmetic. These are polynomially many operations on polynomially many bits, implementable by repeated scans on the one-tape machine. A serial layering gives depth at most the total operation count.
Put and . The output predicate accepts exactly when . If is YES, then and Thus a false rejection is contained in .
If is NO, then and Thus a false acceptance is contained in the same two-sided deviation event .
In oracle mode no added CNOT record is a query slot, while each original slot occurs exactly once per block. Therefore and . Summing over variants gives ; multiplying each variant count by its unchanged declared charge and summing gives . Raw call counts are at most the total operation count; large binary-encoded charges do not justify an unconditional polynomial charged-cost bound. The construction uses no new inverse or controlled access. The same instantiated unitary ports act independently on the disjoint blocks, so the factorization in step 1.1 remains valid, and [F4] applies to each instantiated finite unitary circuit. Ordinary mode contains no oracle slots and remains a circuit over exactly the original library.
Finite event probabilities are sums of nonnegative weights by [F2], so containment makes the probability of either error event in step 2.1 and step 2.2 at most that of the deviation event. Apply [F3] with ; its probability is at most . Since with , and . Therefore because and . Substituting gives . This proves both promised error bounds without evaluating an irrational logarithm.
For the declared interfaces covered by the Statement, the input-copy CNOTs act only on the repeated data registers. On the declared ancillary registers the copy unitary is the identity; composing it with the blockwise exact contracts therefore preserves the clean or dirty return condition, with data target equal to the product of the base targets composed after that copy unitary. Their declared counts are multiplied by ; the additional zero-start input-copy wires remain included in total width, with no claim that they return clean. The output predicate runs on each of the strings, counts successes, computes the rational threshold by exact integer additions and multiplications, and compares the two integers. These operations use polynomial time and space in the polynomially many input bits. Together with step 1.2 and step 2.3, this proves the claimed separate resource bounds and exact query scaling.
Depends on
- Bounded-error repetition amplification
- Oracle-aware full-list quantum circuit family
- Finite quantum promise-computation model
- Circuit-family and computation cost model
- Finite circuit syntax and ordered wire labels
- Denotational semantics of a finite layered circuit
- Clean and dirty ancillas
- Clifford+T gate library and exact matrices
- Finite probability spaces, outcome weights, events, and event probabilities
- Chernoff bound for independent bernoulli trials
- The partial-output acceptance law is a finite probability law
- A full-list uniform generator bounds circuit size and width
Used by
Dependency tree · two levels
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Sources
- John Watrous, Quantum Computational Complexity, Section IV.2 (standard reference, not scraped)
- Ronald de Wolf, Quantum Computing: Lecture Notes, Chapter 13, Section 13.2 and Appendix B.2 (standard reference, not scraped)