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TheoremStatement: Literature-sourcedProof: AI-adaptedPipeline-generated
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The first chip identifies the source of the statement or construction; the second identifies the source of its local proof or verification.

  • Literature-sourced: the exact statement appears in a cited source; only wording and notation differ.
  • AI-adapted: a semantically identical restatement of literature-sourced material, modulo indexing, notation, and boundary cases adopted by the library.
  • AI-generated: a genuinely novel statement formulated by AI, with no source for the claim itself.

These labels describe origin, not correctness: citations and verification chips remain separate evidence.

Exact QSD CNOT Upper Bound

Statement

For n≥2, every n-qubit unitary has an exact no-ancilla circuit with arbitrary one-qubit gates and at most 23484n−322n+43 CNOTs. For n=1, no CNOT is needed. For n=0, a circuit on the empty register realizes a scalar unitary exactly if and only if it is 1; the empty circuit realizes this identity with no gates. This is a gate-count bound; it makes no numerical decomposition-time or finite-precision bit-complexity claim.

Facts & Assumptions

Given: Exact n-qubit matrix semantics, no ancillas, arbitrary one-qubit gates, and CNOT count as the resource.

[F1]

Cosine-Sine Block Decomposition: an even-dimensional unitary factors into block-diagonal unitaries and one central cosine-sine rotation with exact boundary sectors.

[F2]

Demultiplexing a Two-Block Unitary: each two-block unitary factors into two smaller unitaries and a diagonal two-block factor.

[F3]

Gray-Code Synthesis of a Multiplexed Axis Rotation: for either fixed axis a=y,z, a multiplexed Ra with k>0 select bits has an exact cyclic Gray construction with 2k CNOTs; for k=0 it is one rotation with no CNOT.

[F4]

Exact Three-CNOT Synthesis of Two-Qubit Unitaries: an arbitrary two-qubit terminal block has a three-CNOT exact synthesis.

[F5]

One-Qubit Euler Decomposition: Ry(t)=(cos⁡(t/2)−sin⁡(t/2)sin⁡(t/2)cos⁡(t/2)) in the QC7 convention.

[F6]

Denotational semantics of a finite layered circuit: chronological circuit layers L1,…,Ld denote ULd⋯UL1.

[F7]

Finite circuit resource accounting: the declared gate count counts occurrences of the allowed gates in the explicit operation model.

[F8]

CNOT and Control-Target Order: a CNOT is the exact controlled-X permutation with the stated wire order.

[F9]

The computational basis is orthonormal: the computational basis on the CNOT wires is orthonormal.

[F10]

Exact Central Controlled-Z Absorption at a QSD Node proves the exact identity LMR=diag⁡(L0,L1Zr)TR when the terminal Gray controlled-Z is deleted from the central rotation, leaving four generic recursive slots and two multiplexed Rz factors.

[F11]

Finite circuit syntax and ordered wire labels: every gate has positive arity, and a gate occurrence requires that many distinct wires.

[A1]

Two-CNOT Synthesis up to a Migrating Terminal Diagonal proves that every two-qubit unitary is exactly a diagonal times a two-CNOT circuit, and that these diagonals migrate through separators which preserve the two slot-wire labels, saving one CNOT in every slot except the last.

Proof

1.1givenF1F2F6F7algebra

Split off the first wire and recurse on the remaining contiguous wire interval. Apply [F1] to split an n-qubit unitary into a central multiplexed Ry and two block-diagonal factors. Apply [F2] to each side factor: each produces two recursive (n−1)-qubit unitaries and one diagonal two-block factor, which is a multiplexed Rz. Thus the recursive stage contains four (n−1)-qubit calls and three multiplexed rotations, interpreted with exact chronological composition [F6] and the declared no-ancilla width [F7].

2.1step 1.1F3F4F7inductionalgebra

Each of the three multiplexed rotations has n−1 select bits, so [F3] uses at most 2n−1 CNOTs per rotation. With c2=3 from [F4], the recurrence is cn≤4cn−1+3⋅2n−1 for n≥3. Induction gives the unoptimized bound cn≤(9/16)4n−(3/2)2n: it equals 3 at n=2, and substituting the expression for cn−1 into the recurrence gives the expression for cn. The counts are gate occurrences in [F7].

3.1step 1.1step 2.1F2F3F5F7F8F9F10algebra

For the central multiplexed Ry, use the Gray traversal of [F3] with controlled-Z in place of CNOT. Indeed ZRy(t)Z=Ry(−t) by [F5], so the same Walsh angles give branch sign (−1)pj⋅x at mask pj and the final cyclic edge restores the accumulated Z parity. This is exactly the desired multiplexed rotation. Each controlled-Z costs one CNOT: CZ=(I⊗Ry(−π/2)) CNOT (I⊗Ry(π/2)), since the active block is Ry(−π/2)XRy(π/2)=Z; [F8]–[F9] justify the CNOT matrix and unitarity. Take the last Gray edge as a terminal controlled-Z and absorb it into the neighboring generic block-diagonal factor before demultiplexing that factor. In its first-wire control blocks it multiplies the lower-register branch by I or by the single-wire Z on its select wire. Both branches remain arbitrary unitaries, so [F2] still gives four recursive children and two multiplexed Rz factors. The full block identity is LMR=(LEr)TR=diag⁡(L0,L1Zr)TR by [F10], where M=ErT and T omits the terminal controlled-Z. Thus one CNOT is saved at each nonterminal recursive node. There are (4n−2−1)/3 such nodes, zero when n=2. Subtracting this from step 2.1 gives cn≤13244n−322n+13.

4.1step 1.1step 3.1F4F6F7A1algebra

Each recursive call removes the first wire of its contiguous interval, so all N=4n−2 terminal slots act on the same last two wires. Every nonterminal multiplexed rotation targets a wire strictly before these two. Its select operations preserve the computational labels of the last two wires: branch by branch in those labels, its rotations and controlled-X or controlled-Z gates act on other wires. Products of these separator operations therefore have exactly the block form required by [A1]. The preceding controlled-Z absorption only changes the arbitrary child matrices before their recursive decomposition and does not change this target/select invariant. Apply [A1] to the complete ordered slot list: the first N−1 slots now use two CNOTs, and the last uses three, instead of three in every slot. No diagonal is synthesized separately and no wire is added. The additional saving is N−1=4n−2−1. Consequently cn≤(1324−116)4n−322n+13+1=23484n−322n+43. When n=2, N=1, so there is no migration or saving and the formula is the three-CNOT base case.

5.1givenF6F11step 4.1algebra∎

For n=1, the unitary is itself one allowed one-qubit gate and uses zero CNOTs. For n=0, [F11] permits no gate occurrence, so every layer is empty and [F6] makes every circuit denote 1 on C. Conversely, the empty circuit realizes 1. Thus an arbitrary scalar unitary has an exact zero-wire circuit precisely when it equals 1. The bound for n≥2 follows from step 4.1; these gate counts imply no arithmetic or precision bound.

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