Alphabeta Math
DefinitionDefinition: AI-adaptedProof: Not applicablePipeline-generated
How statement and proof provenance work

The first chip identifies the source of the statement or construction; the second identifies the source of its local proof or verification.

  • Literature-sourced: the exact statement appears in a cited source; only wording and notation differ.
  • AI-adapted: a semantically identical restatement of literature-sourced material, modulo indexing, notation, and boundary cases adopted by the library.
  • AI-generated: a genuinely novel statement formulated by AI, with no source for the claim itself.

These labels describe origin, not correctness: citations and verification chips remain separate evidence.

Normalized transport schedule for a J/CZ circuit

Definition

Let C be a finite n-wire circuit over the J(α) and CZ gates, with chronological layers L1,…,Ld and source wire labels 0,…,n−1 as in Finite circuit syntax and ordered wire labels. Schedule index j∈{1,…,n} denotes source wire j−1. For each source layer Lr, let Mr be the matching of its CZ occurrences after reindexing a source pair {u,v} as {u+1,v+1}, and let Jr⊆{1,…,n} be the indices carrying one-qubit gates J(αrj). The source layer has pairwise disjoint gate supports by Finite circuit syntax and ordered wire labels, so no J gate in Jr meets an edge of Mr. By Gates on disjoint wires commute, its denotation may be written with the CZ matching first and then at most one J(αrj) per schedule index j. The normalized transport schedule T(C) is the finite chronological list of rounds (Ms,(αs1,…,αsn)) and the scalar σC defined as follows. A round applies its matching first and then one J gate on each wire. Define σC=∏r:0<∣Jr∣<neiπ(n−∣Jr∣)/4. The round list is the concatenation, in source-layer order, of the blocks specified by the first matching case below; the empty product is 1. This order makes the zero-wire empty-layer case unambiguous:

  1. If Jr=∅ and Mr=∅, the block is empty.
  2. If n≥1 and Jr={1,…,n}, the block consists of one round with matching Mr and the original angles αrj.
  3. If Jr=∅ and Mr≠∅, the block consists of two rounds: the first has matching Mr and angle 0 on every wire; the second has no matching and angle 0 on every wire.
  4. If 0<∣Jr∣<n, the block consists of three rounds. The first has matching Mr, angle αrj on active wires j∈Jr, and angle π/2 on idle wires. The next two have no matching, angle 0 on active wires, and angle π/2 on idle wires. The factor for this mixed layer is included in the displayed product defining σC.

The rounds are numbered s=1,…,R in concatenation order. Their schedule indices continue to denote the corresponding source wires j−1. Angles at indices without an original J gate are padding angles. For a mixed layer, the active-wire product is J(0)J(0)J(α)=J(α) and each idle wire contributes J(π/2)3=eiπ/4I; the scalar is therefore recorded in σC rather than suppressed. The no-J matching case has two J(0)=H transports, whose product is I. No claim about the transport graph's simplicity is part of this definition.

Depends on

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