How statement and proof provenance work
The first chip identifies the source of the statement or construction; the second identifies the source of its local proof or verification.
- Literature-sourced: the exact statement appears in a cited source; only wording and notation differ.
- AI-adapted: a semantically identical restatement of literature-sourced material, modulo indexing, notation, and boundary cases adopted by the library.
- AI-generated: a genuinely novel statement formulated by AI, with no source for the claim itself.
These labels describe origin, not correctness: citations and verification chips remain separate evidence.
Circuit Optimization, Resource Tradeoffs, and Lower Bounds
1 · Prerequisites
- Absolute and Conditional Convergence; Rearrangement; Products
- Algebraic Closure, Embeddings, and Separability
- Algebraic Extensions, Extension Degree, and Finite Fields
- Analyticity of Holomorphic Functions; Liouville and Morera
- Approximate Universality and Solovay–Kitaev
- Arc Length and Rectifiable Curves
- Arithmetic Functions and Dirichlet Convolution
- Binary Operations, Monoids, Groups and Subgroups
- Bounded Linear Operators and Quotient Spaces
- Bounded Variation and the Riemann–Stieltjes Integral
- Chain Conditions, Semisimple Modules and the Wedderburn–Artin Theorem
- Chains, Antichains, Sperner and Dilworth
- Characters and the Orthogonality Relations
- Chebyshev Bounds and Mertens Theorems
- Circuit Syntax, Denotational Semantics, and Measurement
- Classical Zero Free Region and the Prime Number Theorem
- Clifford+T Exact and Approximate Synthesis
- Compactness
- Compactness in Metric Spaces
- Completeness, Completion, and Uniform Continuity
- Complex Coordinate and Path Transport
- Complex Differentiability and the Cauchy–Riemann Equations
- Complex Norms and Realification
- Complex Power Series and Analytic Functions
- Complex Subspace Realification
- Complexification, Realification and Real Structures
- Composition Series, the Jordan–Hölder Theorem and Solvable Groups
- Congruences, the Integers Modulo n and the Chinese Remainder Theorem
- Connectedness
- Construction of the Natural Numbers
- Construction of the Real Numbers via Cauchy Sequences
- Construction of the Real Numbers via Dedekind Cuts
- Continuity, IVT, EVT, and Uniform Continuity
- Continuous-Gate Universality and Exact Synthesis
- Contour Integration
- Controlled Gates, Phase, and Entanglement
- Cosets, Index and Lagrange's Theorem
- Countability and Uncountability
- Cyclic Groups and Direct Products
- Determinants of Matrices over a Commutative Ring
- Diagonalisation and the Minimal Polynomial
- Dirichlet Characters L Functions and Primes in Progressions
- Dirichlet Series and Euler Products
- Divisibility, Euclidean Domains, Principal Ideal Domains and Unique Factorisation
- Divisibility, Greatest Common Divisors and Bézout's Identity
- Dual Spaces, Bilinear and Quadratic Forms, and Sylvester's Law of Inertia
- Effective Numberings, Reductions, Resources, and Randomness
- Eigenvalues, Eigenvectors and the Characteristic Polynomial
- Filters and Ultrafilters
- Finite Averaging and Character-Theory Prerequisites
- Finite Counting, Factorials and Binomial Coefficients
- Finite Dimensional Normed Spaces and Riesz Lemma
- Finite Probability Spaces and Random Variables
- Finite-Dimensional Complex Inner-Product Spaces and Matrix Interfaces
- Formal Languages, Encodings, and Decision Problems
- Foundations of the Real Numbers for Analysis
- Free Modules, Exact Sequences, Projective and Injective Modules
- Fundamental Trigonometric Identities
- Goursat's Theorem and Cauchy's Theorem in a Convex Domain
- Group Actions, Orbits, Stabilisers and Cayley's Theorem
- Group Homomorphisms and the Isomorphism Theorems
- Hilbert Space Geometry and Riesz Representation
- Ideals, Quotient Rings and the Isomorphism Theorems for Rings
- Improper Integrals
- Incidence Algebras and Möbius Inversion
- Infinite Products and the Weierstrass Factorisation Theorem
- Inner Product Spaces, Gram-Schmidt, Projections and Adjoints
- Isolated Singularities and Laurent Series
- Limits of Real Functions
- limsup, liminf, and Subsequential Limits
- Line Integrals and the Gradient Theorem
- Linear Independence, Bases and Dimension
- Linear Recurrences and Rational Generating Functions
- Linear Transformations, Rank-Nullity and Quotient Spaces
- Maschke's Theorem, Complete Reducibility and the Structure of k[G]
- Matrices, the Matrix of a Linear Map, and Change of Basis
- Measurements, POVMs, and Instruments
- Measures and Their Basic Properties
- Metric Spaces
- Mixed Partials, Taylor Formulae, and Extrema
- Modules, Submodules, Quotient Modules and the Isomorphism Theorems
- Monotone Functions, Discontinuities, and Continuity Sets
- Monotone Sequences, Bolzano-Weierstrass, and Cauchy Completeness
- Normal Subgroups and Quotient Groups
- Normed and Banach Spaces
- Order, Zorn's Lemma, and the Axiom of Choice
- Partitions of Unity and Paracompactness
- pi: the Equivalent Characterizations
- Polynomial Rings, the Division Algorithm and Roots
- Power Series and Real-Analytic Functions
- Primes, Euclid's Lemma and the Fundamental Theorem of Arithmetic
- Primitive Roots and Unit Groups Modulo N
- Properties of the Integral and the Working FTC
- Pure and Mixed States, Ensembles, and Schmidt Decomposition
- Qubits, Bloch Sphere, Pauli Algebra, and One-Qubit Gates
- Registers, Tensor Products, and Partial Trace
- Relations, Functions, and Quotients
- Resource Bounds and Machine Invariance
- Reversible Computation, Ancillas, and Coherent Oracles
- Rings, Subrings, Integral Domains and Fields
- Rⁿ as a Normed Space; Vector-Valued Functions
- Roots, Rational Powers, and Classical Inequalities
- Separation Axioms: the Hierarchy
- Sequences and Limits
- Sequences and Series of Functions; Uniform Convergence
- Series: Convergence and the Nonnegative Tests
- Sigma Algebras and Borel Sets
- Simple Field Extensions and the Construction of the Complex Numbers
- Sine, Cosine, and the Definition of Pi
- Splitting Fields
- Strongly Continuous Semigroups and Hille Yosida
- Subspaces, Products, and Quotients
- Suprema and Infima
- Sylow's Theorems, p-Groups and Nilpotent Groups
- Symmetric Groups, Cycle Decomposition and the Sign Homomorphism
- Tensor Products of Modules
- The Cantor Set, Baire Category, and Measure Zero in ℝ
- The Complex Exponential and Euler's Formula
- The Derivative and the Mean Value Theorems
- The Determinant of a Linear Operator, Cofactors and Cramer's Rule
- The Exponential Function
- The Fundamental Theorem of Algebra
- The Fundamental Theorem of Finite Abelian Groups
- The Fundamental Theorems of Calculus
- The Galois Correspondence
- The Group Algebra and Representations of Finite Groups
- The Identity Theorem, the Maximum Principle and the Open Mapping Theorem
- The Lebesgue Integral and the Convergence Theorems
- The Logarithm and General Powers
- The Polynomial Hierarchy and Relativization
- The Residue Theorem and the Evaluation of Real Integrals
- The Riemann Integral: Definition and Integrability
- The Riemann Zeta Function
- The Spectral Theorem, Positive Operators and Singular Value Decomposition
- The Topology of Euclidean Space
- The Total Derivative in ℝᵐ → ℝⁿ
- The Winding Number and the Global Cauchy Theorem
- The ZFC Axioms and the Basic Set Constructions
- Topological Spaces and Continuity
- Topology of ℝ
- Triangularisation, Generalised Eigenspaces and Jordan Canonical Form
- Turing Machines, Configurations, and Computation
- Uniform Circuit Families, Promise Problems, and Complexity
- Vector Spaces, Linear Subspaces, Span and Direct Sums
2 · Summary
This page separates exact optimization tasks from locally terminating rewrites and construction upper bounds. The CNOT counts are not total synthesis costs; the nearest-neighbor factor is specific to the cited line architecture; clean-workspace use requires exact return. Circuit counting fixes a finite gate alphabet, input encoding, ancilla convention and one charged measured output bit. The lower-bound claim is “almost all Boolean functions,” not a statement about each function. The quantum time-space simulation uses the published VMW model with charged operand extent and the explicitly derived classical basis profile. Its finite-precision compiler, fixed-arity effective gate factors, and the separately charged basis-query and majority-reduction bridges are local suppliers; the distinct historical head-access profiles are kept separate.
3 · Logical flowchart
4 · Definitions, theorems and proofs
Unbounded error time space counting model
Definition
Use fixed finite-control fair-bit probabilistic machines with read-only binary input followed by blanks and a fixed finite number of work tapes and heads, with a finite explicit transition-table code. Each nonhalting transition consumes one independent fair bit as in Probabilistic polynomial time machine interface. Fix one access profile for each complexity class.
In the sequential profile, heads move locally by at most one cell per transition. In the erased-index head-access profile, use the head-access mechanism of the final 2012 Van Melkebeek–Watson model: a zero-initialized binary classical work tape, a fixed finite number of input/work heads, and classical finite control. Each head may move left, right, stay, or jump in one transition to an address computed on a designated one-way sequential-access write-only index tape. Index tapes are initially empty, writing each bit is charged to the ordinary transition count, and an index tape is erased after each use. The original input tape is read-only and contains the input followed by blanks. If coincident work heads make an operation undefined, omit that work-tape operation in the transition. All heads start at the left boundary; left motion there clamps at zero.
The published VMW derived basis restriction, denoted the basis profile, also permits the classical basis action of the source's native coherent input query. On a contiguous block of a specified binary work tape, the first bits give the binary input index in most-significant-first order and the last cell holds ; the query replaces only by , using zero on invalid input indices. Both endpoints are freshly emitted on erased index tapes. The native query costs one transition, as in the published quantum model. The input indices are , with ; the empty address word denotes zero, and reversed endpoints cause omission of the query. Allow a fixed finite number of binary work tapes, local operations of fixed finite arity, and native queries on any specified tape: this is the fixed finite product of these classical basis operations, permitting separate path-simulation rows. This is an explicit locally defined comparison model derived from the quantum operations. The source does not separately state a formal classical block-query machine definition, and no equivalence with the index-only profile is assumed. The clocked-normalization lemma proves the required time-only simulation into that profile for clocks at least the input length; no general sublinear-time equivalence is asserted.
For historical comparison, the preprint-delimited VMW profile retains the 2007 preprint convention: a jump reads the address written between two classical work-tape heads, without the final paper's write-only erased index tapes. This is a separately named profile. No equivalence or preservation of time/space bounds between the preprint-delimited and published profiles is asserted. Results proved below for the published profile do not establish their extension to the preprint-delimited profile.
Time is the maximum number of transitions on every branch. Sequential space counts distinct visited work cells. Erased-index and basis space use the maximum address of every work cell accessed on any branch, including the highest endpoint of every native basis-query block; read-only input and index tapes are not counted in this maximum-address measure. The preprint-delimited space convention is likewise its maximum visited work-head address. For a fixed profile, uses strict acceptance probability greater than on members and at most on nonmembers; adds the stated space bound. Subscripts , , , and distinguish the four profiles. An exact classical oracle is deterministic; writing its queries and returning from them are charged, and total query-string length is at most the outer running time.
For either , define and . Oracle queries are exact and all fair-bit branches belong to the outer machine. An omitted profile in an item must be fixed explicitly by that item's hypotheses; profiles are never silently identified.
A formula has a fixed finite set of Boolean variables and is accepted when at least half of assignments satisfy it. A formula has two disjoint ordered variable blocks and is accepted when at least half of outer assignments leave a residual formula true on at least half of inner assignments. Use a common explicit plain-formula encoding for MajSAT. MajMajSAT accepts this same plain encoding with one implicit fresh unused outer variable and all formula variables in the inner block; it also accepts a separately tagged encoding with the two variable blocks explicitly listed. Thus every plain MajSAT instance embeds identically, bit for bit, into MajMajSAT with unchanged truth value. The unused outer variable is part of the decoded fixed finite variable set. Concretely, use distinct fixed tags for plain and partitioned inputs, a unary declaration of the number of variables, fixed-width variable indices, and prefix-encoded binary AND/OR and unary NOT gates (with constant tokens). The partitioned form also gives the outer-block split; variables are renamed into block order. Plain-format validity is checked by one pending-subexpression counter, variable-range checks and a scan of the declared fields, using time and workspace. These conventions do not alter either at-least-half threshold. Malformed encodings are rejected by both problems.
Source-model boundary
The published-profile convention follows Van Melkebeek and Watson, Time-Space Efficient Simulations of Quantum Computations, Theory of Computing 8 (2012), §2.3.1–2.3.2, printed pages 10–11, https://doi.org/10.4086/toc.2012.v008a001. The delimited-head mechanism belongs to the 2007 arXiv preprint. The final-source correction retains that historical mechanism explicitly but grants no theorem about it.
Operand-space clarification
The source informally describes space as maximum work-head address and its simulation proof fixes an -qubit work register. Here operand access is explicit: every local operand and every endpoint of a native query counts as a work-access head for the space measure. This local clarification prevents uncharged query workspace. The source does not explicitly spell out this endpoint rule; it is not quoted as a verbatim source condition. No lower-bound or resource-inclusion claim is made for a literal head-only variant that permits free uncharged query blocks.
DLOGTIME uniform iterated addition threshold circuits
Statement
For , the exact sum of nonnegative -bit integers has constant-depth polynomial-size circuits over AND, OR, NOT and MAJ, with output bits. The circuits are DLOGTIME-uniform under the following explicit array convention: the input bit has tuple address ; array dimensions and gate-coordinate domains may be padded to powers of two, with padded inputs zero. Gate addresses use a fixed number of binary coordinate fields, and the uniformity machine receives the binary dimensions and gate addresses. Equivalently, the input is a bit matrix with both dimensions padded to powers of two. Constants and output truncation are included in the family. The claim does not apply to arbitrary effectively decodable encodings.
Facts & Assumptions
Given: , the bit array in the Statement, and random-access Turing-machine DLOGTIME uniformity. All logarithms in the proof are base two.
Proof
Two-word addition has the following constant-depth Boolean construction. For -bit words , put and . The carry entering bit is A carry is generated by two ones, propagated through positions with at least one one, and killed by two zeros; this proves the formula. The output bit is the XOR of , computed by its constant-size Boolean truth table, with the final carry appended. These formulas have constant depth and polynomial size, and predecessor tests use equality and order on their bit-position addresses.
For , let , let be the least power of two at least , and put . Then . Split each input into consecutive -bit blocks and pad the last block with zeros. For block , define Its upper bound is , polynomial in .
To compute all bits of , pad the row domain to a power of two with . Create a rectangular set of distinct copy gates with , , and . Gates with or are zero; otherwise they copy . There are slots, a power of two polynomial in , and exactly slots are true. For each , feed these slots and distinct constant slots to a MAJ gate, with exactly constant slots equal to one. Its odd fan-in is , so under either convention for majority it tests , equivalently . Write this output as and set , . Then tests , and bit of is the OR of over the indices having bit equal to one. The depth is constant and the size polynomial.
Write . Since and , form two words: has block equal to , and has block equal to and block zero zero. These bits are direct selections from the bits computed in step 2.1. The blocks do not overlap within either word, and Apply step 1.1 once to . This is a constant number of constant-depth stages of polynomial total size.
We verify uniformity explicitly. Use fixed-length tuples with a constant number of -bit fields for gate type, block, row, within-block bit, copy, threshold, output-bit and constant-slot indices. All predecessor predicates in step 1.1 and step 1.2 and step 2.1 and step 3.1 use equality, order, the bit predicate on , , the constant-slot test , and . Since is a power of two, the last relation is a shift and concatenation. The exponent of the power of two is the sum of the corresponding bit-length exponents. Testing compares with the highest nonzero bit position of . Determine the field widths and from the binary dimensions and perform these tests by a constant number of linear scans, additions, subtractions, shifts and comparisons of -bit words. Each gate-type or predecessor query takes time on the random-access uniformity machine; no general multiplication of two varying address fields is used. Dimensions and coordinate domains are padded to powers of two, and positions outside the actual input bounds are constant zero. For , copy the input word. Finally , so the retained output width is exactly the one in the Statement.
Logspace uniform iterated multiplication threshold circuits
Statement
For , let the input be an explicit array of nonnegative -bit integers, with tuple-addressed bits and fixed dimensions supplied to the uniformity machine. Power-of-two padding of the array dimensions is permitted, with padded entries zero. Their exact product, zero-padded to bits, is computed by constant-depth polynomial-size circuits over AND, OR, NOT and MAJ. Circuit descriptions and gate-predecessor predicates are computable in logarithmic space in the total input length. This item does not assert DLOGTIME-uniform multiplication, and its encoding convention does not include arbitrary effectively decodable encodings.
Facts & Assumptions
Given: and the input representation in the Statement. Put . A short integer has bits, and a long word has bits. All prime lists and their subsets below depend only on circuit dimensions, not input values.
Prime number theorem gives , and hence for all sufficiently large .
Every prime modulus admits a primitive root (Every prime modulus admits a primitive root), that is, a generator of its nonzero residue group.
Exact sums of explicitly listed nonnegative binary integers have constant-depth polynomial-size DLOGTIME-uniform threshold circuits under the tuple-addressed array convention (DLOGTIME uniform iterated addition threshold circuits).
Proof
A function of a fixed number of short arguments has polynomially many argument tuples. If its table is logspace-computable, realize each output bit by an OR of equality conjunctions over the tuples yielding one. This is a constant-depth polynomial-size logspace-uniform Boolean lookup circuit. Short addition, multiplication, reduction, inverses modulo a prime, and the table have this property. For the power table, use repeated squaring with a constant number of short residues and a short exponent counter; short multiplication uses grade-school arithmetic in logarithmic space. Find an inverse by trying every short candidate, and test primality by trial division. Enumerate the -th prime by a counter and these primality tests whenever and that prime are polynomially bounded. We may also add polynomially many polynomial-width words by [F3], whose uniformity is stronger than required here.
For a fixed short prime , [F2] gives a generator of the nonzero residues. Find the least such by testing all candidates and all exponents below with step 1.1. The tables , where and , and are logspace-computable by enumeration and modular powering with a constant number of short counters. For nonzero inputs with polynomially bounded , their product modulo is . The exponent sum is polynomially bounded, so compute it with [F3] and use a short power lookup. If any input is zero, select zero instead. For , the product is one exactly when all inputs are one. This gives iterated multiplication in any fixed polynomial-size residue basis in logspace-uniform constant depth. It uses only short tables and addition, without assuming binary iterated multiplication.
Convert a long word to residues by computing for each bit position and modulus, summing these short contributions with [F3], and reducing the result modulo by step 1.1. The sum is polynomially bounded in , because its number of contributions and are. Each constant is logspace-computable. Thus binary-to-residue conversion has the required circuit bounds; for outside the basis range, its vector represents its remainder in that range.
Fix a basis of distinct short primes. Set and . The binary words need not be computed: their required short residues, and then , are generated in logspace by scanning factors and multiplying modulo . Since is one modulo and zero modulo all other basis primes, for the residue vector of we have for a nonnegative integer . Indeed a difference divisible by each of the distinct primes is divisible by their product, while two representatives in cannot differ by a nonzero multiple of . Existence of a representative for every residue vector follows by taking the remainder modulo of the displayed nonnegative sum.
We give a comparison circuit with controlled rounding. Let bound the primes of the fixed basis, put , so , and choose . Compute and Because is a multiple of in , , including and . The low bits of therefore represent a dyadic fraction satisfying . Hence if and only if : distinct representatives differ by at least , and equal representatives give identical residue vectors and identical fractions. All bits of have the required circuits. Its integer part is a short lookup. For odd , bit after the binary point of equals : write ; its even left side and odd imply that have the same parity. These residues are short lookups using modular-power constants. For , only the first fractional bit can be nonzero. This computes precisely the truncation defining . Sum with [F3] and compare the -bit fractions by an OR over their highest differing position, with equality required at all higher positions. That comparator is constant-depth Boolean. Thus residue comparison is logspace-uniform constant depth. The upward offset is essential to handle an exact integer correctly.
Put and let be the product of the first primes, including . Then . For each output index , take disjoint blocks of consecutive primes beyond those first primes, and let be the product of block . Every is odd and exceeds , since each of its factors exceeds the corresponding factor of . The are pairwise relatively prime and relatively prime to . Only primes are needed. By [F1], their numerical values are polynomially bounded in for all sufficiently large ; the finitely many smaller dimensions have fixed circuits. Enumeration of each block and its residues modulo any short prime is logspace-computable by scanning its factors as in step 1.1 and step 2.3. No bit of a long prime product is requested from the uniformity machine.
Extend the representation of to a fixed short prime not in its basis by trying every possible residue . In basis , each candidate has a unique representative . The representatives with the old residues are exactly , , so exactly one is below . The representation of in basis has zero on the old primes and the fixed short product on the new prime. Compare each candidate with it using step 3.1 and select the unique successful . This computes . Extend to any polynomial-size new basis in parallel, treating its new primes independently. Removing primes just discards coordinates. No binary value of is needed.
Fix a squarefree divisor of the basis product and put . Restrict the representation of to basis to obtain in , and extend back to basis by step 4.1. For each , compute , where and its inverse are fixed short constants from step 1.1. This is the representation of modulo ; since , it is the canonical one. Extend it from basis to basis by step 4.1. If , output zero; if , return . All componentwise operations are short lookups. This proves constant-depth logspace-uniform division by these fixed squarefree products without assuming general binary division.
Let be given in basis and fix . Put and . Extend to basis by step 4.1. Compute each fixed modulo each basis prime and add one componentwise. This represents . Since and is odd, step 5.1 computes in basis . Using step 2.1, compute in that basis. There is no wraparound, since and imply . Divide by with step 5.1 to obtain in basis .
We have . Since and , the binomial coefficients bounded by powers of give Consequently . Thus is either or that integer plus one. Retain unless , in which case subtract one. The comparison in basis is valid without wraparound: . Compute the residues of by step 1.1, multiply componentwise, and compare by step 3.1. Subtraction by one is componentwise and occurs only when . The selected vector represents , whose residue modulo is bit of . Bit zero is already the residue of modulo . Thus all bits are recovered by parallel copies of a constant-depth circuit.
Convert the input words to basis by step 2.2 and multiply their residue vectors by step 2.1. Their exact product satisfies , including zero factors, so this is its canonical residue vector. Apply step 3.2 and step 6.1 and step 7.1 in parallel at every index . The result is its exact binary product, with precisely output bits and leading zeros where required.
Every basis length, prime value, table argument, loop index and word width above is polynomially bounded in . In step 3.1, the approximant width is for its polynomial-size basis length , hence polynomial as well. Each table has a fixed number of short arguments and polynomially many rows. Each conversion, comparison, extension and division uses a fixed finite number of layers of tables, Boolean gates and [F3]; their nesting in step 1.1 and step 2.1 and step 2.2 and step 2.3 and step 3.1 and step 4.1 and step 5.1 and step 3.2 and step 6.1 and step 7.1 and step 8.1 has depth independent of all dimensions and prime counts. Trials over primes, residues, table rows and output bits are parallel copies. Thus the total size is polynomial and depth constant. Label gates by their stage and a fixed number of polynomially bounded coordinates. A logspace machine enumerates the fixed prime lists, computes needed residues by repeated modular multiplication, computes power and discrete-log table bits as in step 1.1 and step 2.1, and decides local wiring using short counters. The composition depth of subcircuit descriptions is fixed, so intermediate descriptions can be recomputed using workspace. The machine never stores or another long product. The addition circuits from [F3] are also logspace-uniform. This proves both logarithmic-space description generation and the gate-predecessor predicate, completing the Statement.
BQTISP Model
Definition
Use the published VMW model from Van Melkebeek and Watson, Theory of Computing 8 (2012), §2.3.1–2.3.2. It has three semi-infinite tapes: read-only binary input followed by blanks; a zero-initialized classical binary work tape; and a zero-initialized quantum work tape. There are a fixed finite number of heads, possibly several per tape. Each classical control state has an associated local classical function and local quantum operation, applied jointly to the cells under the respective work heads. The next control state and head movements depend on the current state, the input/classical symbols scanned at the beginning of the transition, and that transition's measurement outcome, if any. Earlier outcomes can influence later operations through the control state. These choices do not depend on the quantum basis path. A quantum operation is a unitary on the cells under the quantum heads or a single-qubit computational-basis measurement.
Each head may move left, right, stay, or jump in one transition to a precomputed classical address. Addresses are written on special one-way sequential-access write-only index tapes and those tapes are erased after every use; all index-bit writing is charged to ordinary transitions. Coherent input access may apply to a contiguous quantum-work block, with out-of-range input bit zero. The endpoint convention is : the MSB-first address occupies and the answer is cell ; use input indices , , empty address zero, and omit a reversed-endpoint query. Its two endpoint addresses are likewise supplied on these erased index tapes. The coherent query itself costs one transition. The classical input tape's out-of-range cells are blank. These two output conventions are distinct and fixed by the source. If colliding work heads make an operation undefined, omit the operation on that work tape.
Input cells and the separate index tapes are not counted in the maximum-workhead-address space measure. Space is the maximum address of any work operand: ordinary classical/quantum head visits and the highest endpoint of every native query block are all charged; time and space maximize over every branch, including branches of probability zero. For each fixed unitary matrix entry, real and imaginary parts have deterministic approximators computing precision in time polynomial in . This permits polylogarithmic time and workspace at precision ; it does not assert linear-space approximators for arbitrary entries.
For a promise problem , means such a machine takes transitions and maximum work address on every branch, accepts with probability at least , and accepts with probability at most . No acceptance guarantee is required off the promise; the resource bounds remain worst-case. omits the space bound. Its classical comparison classes are the explicitly derived full-basis comparison classes and in Unbounded error time space counting model. They permit a fixed finite product of classical basis tapes with the same native input-query operation. No generic inclusion into the narrower erased-index head-access-only class is assumed.
Historical profile
The 2007 arXiv preprint instead places a classical jump's address between two classical work heads and describes coherent-query blocks by head-delimited work regions. Retain that mechanism as the separately named preprint-delimited quantum profile. No equivalence with the final model, and no transfer of a proved final-model lower bound to that preprint profile, is asserted here. Extending the final-model lower bound to that distinct mechanism remains an unproved local obligation.
Operand-space clarification
This item explicitly treats a query endpoint as a work-access head, consistent with the source proof's finite -qubit register. The final paper's informal maximum-head wording does not separately state this rule. We adopt it as a local clarification of intended operand-space accounting, not as a verbatim quotation or a proof about a literal head-only variant with uncharged query workspace.
Bounded-overhead tie normalization for fair-bit machines
Statement
For a fair-bit probabilistic machine with an explicit time-constructible integer clock , a machine with no exact acceptance probability can be formed with additional time. It preserves strict-majority membership, and swapping its accept/reject labels decides the complement.
Facts & Assumptions
Given: a fixed fair-bit probabilistic machine, an explicit time-constructible integer clock that bounds every branch, and acceptance probability on an input of length .
A length-R fair-bit string has probability 2^{-R}; unused suffix bits after halting are counted with their common halting outcome (Probabilistic polynomial time machine interface).
PrTIME uses strict acceptance probability greater than one half, while a no-instance has probability at most one half (Unbounded error time space counting model).
The clock is a time-constructible function, so a machine can perform the specified padding transitions (Time-constructible and space-constructible functions).
Proof
At the fixed input let and let count accepting strings among the fair-bit strings, including unused suffixes after early halting; then by [F1]. The new machine first reads selector bits, rejecting only the all-zero selector. On every nonzero selector it simulates the original machine for at most steps using fresh bits, records its outcome, and consumes any unused suffix bits in a no-op state. On the zero selector it consumes all fresh bits and rejects. By [F3] this is a well-defined clocked procedure. There are exactly equiprobable strings and exactly accepting ones, so .
If then . If , then , so ; because , . Thus strict majority is preserved and an original tie becomes a strict no-instance.
The new acceptance probability cannot equal one half: such equality would require the integer to equal , which is not an integer because its denominator is odd and greater than one. Since no tie remains, swapping accepting and rejecting labels makes the complement machine accept strictly above one half exactly on the original no-instances. The selector and padding add transitions, so the overhead is .
Uniform clocked simulation of encoded probabilistic machines
Statement
Fix the explicit complete transition-table coding specified below. There are two distinct fixed finite-alphabet probabilistic interpreters, one for the sequential access profile and one for the erased-index head-access-only random-access profile. Each interpreter simulates valid descriptions with input and an external binary clock , reproducing exactly the source acceptance or rejection reached in at most source transitions and rejecting nonhalting expiry. The simulated fair-bit distribution is exact. Writing and , there are absolute constants such that each simulation takes time For the index-only profile, jump addresses are written on one-way sequential write-only index tapes erased after use; the older nonerasing delimited-head profile is a distinct profile and is not covered by this index-only assertion. The fixed interpreter has a fixed finite physical head count even when the described source head count varies. Malformed descriptions halt rejecting. This is a time simulation; no preservation of the source's simultaneous space bound is asserted.
In particular, for each fixed polynomially bounded time-constructible and fixed , descriptions of length at most are simulated in either one fixed declared profile in time, including the clock constructor. Arbitrary superpolynomial clocks retain the general displayed bound rather than this specialization.
Facts & Assumptions
Given: A code , binary input of length , external binary clock , and one of the two declared profiles. Put . Work without any choice principle.
Unbounded error time space counting model supplies the sequential fair-bit profile and the erased-index head-access-only profile. The latter has ordinary charged one-way write-only index emission and erases an index after each use. Each source transition emits at most one bit on each source index tape. It is distinct from the older preprint's nonerasing delimited-head profile. Both interpreters consume one independent fair bit per simulated source transition.
Effective binary encodings and total decoders defines effectiveness without a complexity guarantee. The explicit table coding constructed below, rather than an arbitrary effective encoding, supplies the required parsing bound.
Time-constructible and space-constructible functions supplies the fixed clock constructor. For the polynomial specialization, both and a fixed polynomial upper bound for are assumed.
Proof
Specify the syntax rather than appealing to an arbitrary effective code. Use canonical binary numeric fields, each encoded as , and encode a tuple of such fields by followed by their encodings. Supply two complete transition tables, one for each fair-bit value. The virtual input tape is read-only, each work tape is initially blank, and each head starts at cell zero with clamped left motion. The finite input alphabet is the two binary input symbols, distinguished from blank. A header lists the tape count , alphabet size , state count , start and two distinct halting states; the two tables list every nonhalting state/scanned-symbol tuple in lexicographic order, each with its next state, written symbols, and local moves or stationary requests. For the read-only tape require its written symbol to equal the scanned symbol. All integers use canonical binary numerals, all blocks carry unary length headers, and the number of blocks is unary-prefixed. Include explicit table delimiters and a profile tag. This is prefix-free, includes each finite machine of the chosen numeric form, and has a total decoder. If the start state is nonhalting, a complete table contains at least one row with symbol/move fields and contains all nonhalting states and scanned symbols, giving , and . An initially halting machine will instead be handled without per-tape initialization by an early return after validation. Each stored integer has at most bits even without these sharper bounds.
For this erased-index interpreter put , and , so and . Use the explicit unary-length tuple syntax from the sequential candidate, now adding finite head labels, the source index-tape labels, a profile tag, index-output actions and native jump actions to each transition row. A row specifies all source actions, and the complete table explicitly includes every state/scanned-symbol/bit case. For nonhalting start states, at least one such row exists, so the number of source heads and index tapes, every alphabet width, and each instruction-record width are bounded by a fixed polynomial in . Initially halting machines use that early return. The source's one binary work tape is included as a special case; any allowed finite additional tapes receive tape labels. Parse and validate by capped expected-count arithmetic without expanding an asserted table; this takes time. State and scanned-symbol lookup by repeated scans of the saved table costs per source transition. The fixed physical interpreter never acquires a new head or an alphabet depending on .
Parse and check the actual blocks without expanding a claimed table. Count the actual rows first; compute expected products and powers by binary arithmetic capped one above that actual count, rejecting excess, invalid ranges, missing rows or extra data. If there are no nonhalting states, the expected row count is zero without computing a power or iterating over tape/head labels. Check each actual row's arity against the binary header by counting its actual fields, never by a loop of header-specified length. This bounds all valid and invalid code processing by a polynomial in : the operands, counters and scans have length , there are actual blocks, and every product/exponent loop is capped or uses at most exponent bits. Ordinary repeated scans and school arithmetic suffice, for example in time and space. After validation, if the start state is halting, report that outcome immediately, even for , without allocating or initializing per-tape or per-head structures. Otherwise the parameter bounds of steps 1.1 and 1.2 apply to all following phases. Preserve a decoded table of length , runtime parameters and fixed-width symbol/state codes of width at most . Copy to a sequential archive and read/copy the clock in time. All subsequent routines use fixed physical tape counts and fixed alphabets; variable-size data remain on tapes.
For each source index tape reserve a separate contiguous region of binary cells, with its current length stored in metadata. Reserve these regions by arithmetic base offsets before the dictionary heap; reservation moves no head through the regions and requires no initialization sweep. A source index emits at most one bit per source transition, so its live word always fits. Appending a source bit writes at its region's base plus current length and increments that length. Use/reset sets the length to zero; future emission overwrites old bits, and reading only the current prefix ignores the discarded suffix. Interleaved emission onto different source indexes therefore never interleaves their physical words. Since at most bits are emitted per source transition, the sum of lengths of all words consumed at jumps, plus lengths still live at expiry, satisfies , up to a harmless fixed-format constant. A jump using one word for several source heads in the same transition multiplies this accounting by at most , still a polynomial in . Reading, copying or canonicalizing each consumed word once, or a fixed number of times per affected head, therefore has total length . The reserved regions' total extent is , consistent with later maximum-address bounds. This charged fresh-writing invariant is exactly what fails for the old nonerasing delimited-head model.
Split each numerical source head address uniquely as , where . Call its block prefix and its short offset. Store the short offset in bits. Maintain a global prefix dictionary assigning one compact integer block ID to each registered numerical prefix. A dictionary key for is the prefix-free word , where is the canonical binary numeral of , including at zero. Use a literal binary trie: each node has two child pointers, an optional terminal block ID and its fixed metadata. Reading/inserting a key follows or creates one node per bit. Numerical equality of prefixes is equality of their canonical words, hence exactly equality of terminal nodes. No balancing, probabilistic hashing, numerical unit-cost large integers or unspecified dictionary theorem is required. Include a tape label in this key when more than one virtual work tape is allowed.
For each virtual tape, store its scanned cell as a centre and the cells on either side as two ordered stacks, nearest cell first. At level , put ; each side has capacity , occupancy or , and complementary occupancies summing to . Initially each side has occupancy at every level; the right stack holds the input suffix on the input tape and blanks elsewhere, and all left stacks are blank. Each record has an immutable origin bit, one exactly for source cell zero; it moves with the symbol record. Genuine records are packed at the near end of each zone, and concatenating zones while ignoring holes gives the stack. Each physical slot has delimited virtual fields, each of width at most , containing a symbol and an immutable origin bit, or a hole. Store the centre fields and the three-valued occupancy flags explicitly. A slot therefore has width ; this uses no alphabet depending on and no additional physical tape for each virtual tape. A stationary move changes only the centre symbol. At the left origin a requested left move also changes only that symbol. For the input tape suppress writes. These modifications preserve the same stack and origin invariants.
On a source head's jump, read the consumed address word, discard leading zeros and split off its final bits as , padding on the left with zeros if the word has fewer than bits. The remaining canonical prefix is , or zero. Form canonical when , and by ordinary binary scans; forming all three costs for address-word length . Register them in the prefix trie. Record their three compact IDs as a private cache for this head, and record that the current block is the middle one. Use a special clamped boundary marker instead of a negative block when . Initialize each source head at address zero with this same cache for zero and one. If several source heads jump to the same address, their numerical prefixes receive the same global IDs. The total number of prefix-trie nodes is at most the total length of all registered keys, hence at most : for each jump, all three prefix keys have length , and step 2.2 charges their summed lengths. Duplicated registrations only decrease the node count. Tape-label overhead adds at most bits per jump.
Implement a move to the right by first writing the old centre and choosing the least with a nonempty right zone. All lower right zones are empty and their left partners full. Remove the first records of right zone : the first becomes the new centre, and the remaining fill the lower right zones in order, per zone. Right occupancy at level decreases by . Prepend to the concatenation of the lower left zones. The resulting records split into a first list of length , distributed in order half-full among the lower left zones, and a remaining list of length , prepended to left zone . Its previous occupancy was zero or , so no capacity is exceeded. Both stacks keep their order, complementary occupancies at level are preserved, and every lower zone becomes half-full. For these instructions simply exchange a stack record with the centre and push the old centre on the other stack. A left move interchanges left and right; at the origin it only writes the centre. Untouched higher zones are half-full, so a source zone always exists. Thus every operation preserves the representation and performs exactly the prescribed source move.
Between two jumps of this head, its address changes by at most in total absolute distance from its most recent jump address, since every local move changes it by at most one and there are at most source transitions altogether. As , every intervening address belongs to one of the three blocks cached at that jump. A local move updates the -bit offset; overflow/underflow switches to the appropriate adjacent cached ID and wraps the offset. Store the current cache position as one of three finite values. Even if the head crosses the same block boundary many times, the existing IDs are reused, with no re-reading or arithmetic on long prefixes. From the lower cached block it cannot cross to an uncached lower block, and from the upper cached block it cannot cross to an uncached upper block: either would require more than local moves since the jump. Clamp a left move at numerical zero. Thus the pair (current block ID, short offset) is always an exact address representation, with bits after accounting for the polynomial number of trie nodes.
Make the scan algorithms uniform as follows. To process virtual field , keep a unary field index of length at most ; at each slot count through the delimited fields, copy or replace just field , and copy the other fields unchanged. A full slot, its index operations, and returning a scratch head across the bounded parameter records cost at most . The same bound covers building one fresh slot by copying the saved width and tape-count templates. Midpoint/end markers specify half-zones, so the scans need no growing arithmetic per record. Copying the selected genuine field records to scratch, distributing the prescribed lists, restoring holes and flags, and returning the physical heads use a fixed number of prefix scans for step 4.1; at level they traverse slots. Endpoint and optional level-label overhead is also , since the sum of the binary level-label lengths through is . Thus the work for a level- event on one virtual tape is at most , uniformly in . This deliberately generous bound includes scans to find the least nonempty source zone, scratch copying, occupancy changes and allocating new levels by doubling the preceding unary capacity marker. Each operation is a scan, a finite-width copy, or an index operation of length at most ; no unit-cost random memory operation is being assumed.
The event count is independent of field width. Fix a virtual tape and . Its right occupancy below level starts at . Each event at level at least resets it to ; a lower-level positive or negative move changes it by minus or plus one, and a stationary or clamped move leaves it fixed. An event at level at least requires the appropriate lower stack empty, hence occupancy zero or immediately beforehand. It therefore requires at least preceding lower-level moves and then its triggering transition. Among simulated transitions there are at most such events, including the first. Level zero has at most events, and no level with is reached. The redistribution in step 4.1 resets all lower zones even when its level is strictly larger than ; successive operations on different virtual tapes do not change each other's fields.
Maintain a second literal binary trie for virtual work cells, keyed by the compact block ID and the -bit offset, with explicit length delimiters (and virtual tape label if needed). The key length is . Every terminal stores the virtual symbol, initially zero/blank on first lookup. Each source transition touches at most virtual cells, so there are at most terminal keys and nodes in this trie. All keys with the same virtual cell get the same terminal, regardless of which source head or which jump registered that prefix. Source work-tape collisions can therefore be detected by comparing these compact address pairs for all relevant heads, in work per transition. Omit precisely the operations declared undefined by the source's collision convention. Read all source scanned symbols and save all source instructions before any virtual write or move.
Initially retain the input archive at position one and initialize only the centres. On first allocating level , fill the first virtual tape's untouched right half from the next archive symbols, then blanks after exhaustion; initialize the other virtual fields with blank and unoccupied halves with holes. Levels are allocated in increasing order, and lower operations do not alter that untouched suffix, so every archive symbol is consumed at most once. A new level uses only the work charged to the event reaching it. Initially right zone represents source positions ; hence the archive is exactly at the next untouched interval. Slot creation and symbol coding are charged by step 5.1. Thus no full distribution pass is hidden in initialization.
Before each virtual transition, test the saved state, then test expiry. If still nonhalting with positive countdown, consume one fresh fair bit to choose the corresponding decoded table. Deterministically scan its rows and compare the source state/scanned-symbol tuple with the saved state and centres, copying the unique instructions into scratch. At most rows and saved fields are involved; repeated full scans and resets take per transition. Save all instructions before applying any virtual write/move, process the buffer operations in order, then update the state and decrement the binary countdown. Test the new halting state before the next expiry test, so a halt on transition is reported. A whole countdown scan costs per virtual transition. At the nonhalting initial configuration expires immediately.
Treat read-only input separately. Since , an input-head address is in range only if its block prefix is zero and its short offset is an input position. The global trie has the distinguished ID for zero, so this is a comparison of compact IDs followed by comparison of -bit integers. On an in-range address issue a native input query with the original short address, or its fixed encoding-offset translation if the physical interpreter input is a paired encoding of . This translation has bits. On an out-of-range address return the source's prescribed blank. The same compact head representation implements local input moves and jumps. The original input is never expanded into the work-cell trie.
Store the two tries, the reserved source index-word regions, finite-program records, per-head caches, short counters and scratch on allocated regions of the interpreter's single binary classical work tape. Encode record delimiters and symbols by constant-length binary blocks. Long key/input-word arrays have total length ; trie nodes and other records have length . The cell trie has nodes by step 5.3. Consequently every physical location used is below , and every pointer has bits. No source's enormous numerical address is used as a physical memory location. Reserve the polynomially sized source-program/scratch region and the source-index regions by arithmetic offsets, then use a global high-water counter to append-allocate the dictionary heap and saved long keys. This reserves address intervals without writing their unused cells.
Buffer correctness from step 4.1 and the saved-instructions ordering imply by induction that after each virtual transition the interpreter stores the exact virtual configuration prescribed by the consumed bits. Although the physical probabilistic machine receives a bit at every physical transition, ignore all of them except at the designated virtual-choice operation. Conditional on every past consumed bit and the corresponding completed deterministic simulation, the next designated bit is still unbiased and independent: its location depends only on previous bits, and disjoint future coordinates of a finite independent-bit string have the prescribed fair conditional law. Equivalently, for each fixed virtual choice prefix of length , induction on its successive designated choice operations gives probability ; ignored physical bits have total conditional probability one. Terminal virtual prefixes are disjoint. Summing their masses proves exact agreement of acceptance/rejection/timeout probabilities, including branch-dependent halt times.
Summing step 5.1 using step 5.2, first for each tape and then over , bounds total buffer and lazy-allocation work by when . Add polynomial code processing, the input archive scan, transition lookup, and the binary-clock work. The physical heads move locally by at most one cell per transition, as required by the sequential profile. Enlarging the absolute exponent to and the constant covers all contributions, the binary-clock input length, and . This proves the general displayed bound.
Choose one pointer width at initialization, for an absolute constant exceeding all fixed exponents in step 6.4. Node-count and record-length bounds there imply that the allocated region is smaller than ; indeed its logarithm is . Thus all pointers, lengths and allocation counters can be padded to bits, and every trie node has fixed-width updatable pointer fields; no shifting of a long suffix or variable-record reallocation is needed. A fixed set of physical work heads accesses a record by emitting its short physical pointer on its own one-way erased index tape, taking transitions, making the native jump, and reading or updating that record by local scans. Pointers, offsets and record metadata have polynomial-in- times logarithmic length, so each trie-node operation and each elementary bit-array read/copy takes physical transitions. Each concrete record operation is a bounded number of short-address accesses, scans, and ordinary binary arithmetic. This constructs a fixed-head interpreter in the same erased-index profile; its address emission is charged, and no head count depending on has been assumed.
If and for fixed , then and . Construct unary by a sequential input scan, run the fixed constructor in [F4], and use its binary output as . Since , initialization, construction and simulation together use time. The interpreter's simulated transitions remain sequential throughout. This proves the stated specialization without asserting a corresponding bound for arbitrary superpolynomial clocks or for VMW jumps.
Sum the work. Prefix registration uses key-bit operations by step 2.2 and step 3.2, plus at most splitting/offset work per jump. Every source transition performs program/head/short-counter operations and at most work-cell-trie lookups, each traversing nodes. Native input queries and the binary countdown take polynomially many short-record operations per source transition. Multiply by step 7.3's cost per operation, add the initial input scan and polynomial code parser, and enlarge one absolute exponent to obtain the proposed time bound. Step 6.4 independently bounds maximum physical work-head address by that time bound. This normalization is for time-only use: it does not preserve the original source's smaller space bound.
At each simulated configuration, test the source halting state before expiry. If nonhalting and the countdown is positive, take one designated fresh fair bit, select the source table, perform the deterministic operations above, and decrement. The dictionaries preserve exact source-cell equality and values, the prefix/offset invariant preserves exact head addresses, and the index arrays preserve exactly the source's newly written addresses and erasure. Induction on source transitions therefore reproduces the full source configuration up to expiry, including simultaneous actions and source collision semantics. A halt on transition is reported; a still-nonhalting configuration at expiry rejects. Ignore physical fair bits at all operations except the designated one-per-source-transition choice. Conditional on each consumed prefix, the next designated bit is an independent fair bit, so each source choice prefix of length has mass . Summing over disjoint terminal choice prefixes proves exact probability preservation.
For and fixed polynomially bounded , both and are polylogarithmic in . The displayed general bound is consequently . Scanning to construct unary costs . Its fixed deterministic time-constructible constructor runs in sequential time. Execute that fixed local-move machine using the already proved external-clock erased-index interpreter with successive budgets , restarting from its initial configuration until it halts and yields the binary clock. This uses no advance knowledge of : the last budget is , the sum of the budgets is , and the repeated input scans cost . Since is polynomially bounded and at least , the whole constructor simulation is , absorbed in the specialization. A deterministic constructor ignores the interpreter's designated fair bits. The sequential interpreter of phases 1–4 gives the specialization for the sequential profile. Neither argument identifies the erased-index profile with the old delimited-head profile.
Remarks
The proof uses distinct interpreters for the two profiles. The erased-index representation stores dense dictionaries proportional to the time used; it supplies no VMW-to-sequential simultaneous time/space bridge. The source-space coordinate therefore cannot be transported through this lemma in a counting time/space argument.
The index-only interpretation uses the final 2012 erased-index convention. It is distinct from both the derived full-basis comparison profile and the older 2007 delimited-head profile; no equivalence is asserted here.
Bounded-space simulation of a generated input
Statement
Let have length , and let have known length . Suppose its zero-based bit can be generated deterministically in time and work cells, with ordinary direct indexed access to . Fix a classical derived-basis machine whose run on takes at most a known polynomial clock and whose work operands, including native query endpoints, all lie below a known power of two . The dimensions and clocks have polylogarithmic-time/logspace binary generators. There is an index-only erased-index simulation on with identical branch outcomes and probabilities, time , and work-access extent . The simulated machine has fixed finite head and tape counts; its constants may depend on that machine, the generators and . This does not assert a sublinear-time simulation or normalization of unrestricted work addresses.
Facts & Assumptions
Given: the generators and bounds in the Statement. A separate physical tape is available for each of a fixed finite number of simulated work tapes and auxiliary trees; the total tape/head count remains fixed.
Unbounded error time space counting model defines the derived basis profile, its native input-query operation, the index-only erased-index profile and charged operand-space convention. An input basis query on work block reads its MSB-first address in and flips its answer at using the one-based input bit, with invalid indices giving zero.
Proof
Store each simulated binary work tape unchanged on a physical binary tape, initially zero, and maintain its fixed finite head addresses with -bit counters. Since all work accesses are below , every valid work-head/index endpoint value is bounded by . Accumulate a freshly emitted source index bit by shift-and-append, saturating work indices at and ordinary input-head indices at . A work overflow cannot be used on the promised run; appending bits cannot undo it. An overflowing input jump remains outside the input for every remaining local step, so a FAR marker returns blank until the next jump. Index lengths and emitted contents are unread except on use; these numeric summaries and resets therefore implement exactly their observable effects. Each counter operation, short physical index emission, head read/write and input-position comparison costs polylogarithmic time and logarithmic workspace. Physical input-head read at position calls the generator of , using charged short erased indices for its source-input reads. Outside that range it returns blank.
For each simulated work tape keep a second zero-initialized binary tape containing the heap representation of a complete binary OR tree with leaves. Leaf stores work bit for , and internal node stores the OR of nodes . Initially every value is zero, matching the source; no initialization sweep is needed. When work bit changes, update its leaf and ascend through to the root, recomputing each OR from its two children. At most nodes are visited; every address is below and takes bits to emit. Thus an update costs polylogarithmic time with only a fixed number of logarithmic counters. The invariant follows inductively because only ancestors of the changed leaf can change. Arbitrarily many zero cells require no explicit allocation or stored pointers.
The OR of work interval is found in at most tree-node reads. Initialize the accumulated OR to zero and put , . While , if is odd include node and increment ; then if is odd decrement and include that node; finally replace both by their integer halves. Return the accumulated OR when , in particular zero without a node read when . At each iteration the included fringe nodes are disjoint, and the remaining uncovered interval is the union of the complete sibling pairs between the updated endpoints; halving replaces precisely those pairs by their parents. Induction proves that the included nodes partition exactly the original leaf interval. Each level includes at most two nodes, and there are at most levels. Their stored OR is therefore exactly the requested range OR. The procedure uses logarithmic counters and polylogarithmic time.
Implement a native source query with as follows. Put , and inspect the last address bits immediately before , using short physical addresses. Let . Query the tree OR of . If it is one, the binary input address is at least , so the native query leaves its answer unchanged. Otherwise the entire numerical address is the inspected low word, padded with leading zeros to bits. For , generate and XOR it into work bit , then update that tape's OR tree as in step 2.1. For an invalid index leave the answer unchanged. The empty address gives zero and hence no change, and reversed endpoints are omitted as specified by [F1]. Only work-bit reads, a range-OR query, one generator call and one update are needed. Every accessed physical work/tree address is , and only logarithmic scratch is used. The source address word can be reused indefinitely; the maintained tree avoids rescanning its long high part.
Ordinary source local operations change only a fixed finite number of bits, so apply step 2.1 to each changed bit after taking the source's simultaneous reads and respecting its collision rule. Source input queries are exact by step 1.1 and step 4.1, and all head/index transitions are exact by step 1.1. Induction on the source clock therefore gives the identical source configurations and branch outcomes, with the harmless FAR summary of permanently blank input positions. The simulator takes exactly one designated independent fair bit per source transition and ignores all its other physical fair bits; each source choice prefix has its original mass . All auxiliary work is deterministic, so outcomes and acceptance probabilities are identical. At most a polylogarithmic amount of work is done per transition, plus the initial input-length setup. Source work and OR trees have extent on fixed finitely many tapes, and every generator/counter needs workspace. These are exactly the claimed time and space bounds.
Logspace predicates in a fixed linear counting hierarchy level
Statement
Every language in conventional deterministic logarithmic space lies in and for some fixed integer . Here logarithmic space has its standard uniformity meaning: the read-only input positions are bounded by endmarkers, and any input-address register counts toward workspace. The level may depend on the fixed predicate machine. This statement is used for the standard logspace wiring predicate of polynomial-size circuits.
Facts & Assumptions
Given: a fixed conventional deterministic logarithmic-space predicate machine, with bounded read-only input positions and any explicit input-address registers charged to workspace.
Unbounded error time space counting model fixes the oracle and input-access conventions for each LCH level.
Proof
Fix the machine. Its input-head positions, finite state and logarithmic workspace have at most configurations, for a fixed integer . A halting deterministic computation cannot repeat a configuration, so increase to bound its running time by . Make both halting states absorbing. A configuration has bits, including the conventional bounded input positions, charged input-address registers if used, finite state and work symbols. Small input lengths can be decided separately.
Put for sufficiently large . To assert that configuration reaches in exactly steps, existentially specify intermediate configurations. Divide into consecutive intervals whose lengths differ by at most one. Universally select one interval and assert the corresponding endpoint reachability for that shorter length. This equivalence follows by taking the actual intermediate configurations in the forward direction and concatenating all verified segments in the reverse direction. Iterate for a fixed levels; continue until the selected interval has bounded constant length. Indeed the recurrence gives , bounded by three for a sufficiently large fixed . At each level the existential list uses bits, and the universal index uses bits. Zero-length intervals demand equal endpoints.
A fixed-level verification takes sequential time. The machine reads/copies and checks the short configuration list by sequential scans. To pass a selected subproblem to its next level it writes , the two selected endpoints and the interval length, using symbols. At a leaf it initializes the fixed simulated tapes from the endpoint and moves the input head to its specified position by a scan of length at most ; it then simulates at most three transitions and checks the endpoint in total time. If the conventional logspace predicate uses bounded random-access input queries, each of these constantly many queries can be performed by a sequential scan of of length . This makes no near-linear sequential simulation claim for an entire random-access computation. Arithmetic on the -bit interval lengths costs a fixed polylogarithmic amount, absorbed by .
Convert the constant alternating sequence to a fixed finite number of linear probabilistic oracle levels. For an existential block of guessed bits with oracle-verifiable predicate , use one extra fair bit: on branch 0 accept unconditionally; on branch 1 guess those bits and accept exactly when holds. Padding both branches to bits gives acceptance probability , strictly above half precisely when a witness exists. Universal blocks are complements of existential blocks with complemented predicates. Complement is available with linear overhead by Bounded-overhead tie normalization for fair-bit machines: for a machine with exactly fair bits and acceptance probability , first reject on the all-zero -bit selector and otherwise run that machine. Its new acceptance probability has the original strict-majority decision and never ties, since an original positive gap is at least . Exchanging accepting and rejecting labels therefore decides the complement. The same proof uses exact oracle answers and relativizes. Query lengths and per-level work are by step 3.1; a fixed tagged union of the needed oracle predicates lies at their maximum level, after padding lower levels by dummy queries. Thus finitely many levels suffice. Finally existentially select the accepting endpoint at time and apply the reachability predicate. This decides the original machine's language in sequential for some fixed . Sequential fixed-tape machines embed into the published binary multihead profile with a fixed number of interleaved tracks: neighboring cells are a fixed stride apart, so local moves take constant time. This embeds each sequential hierarchy level into the corresponding published-profile level as well.
Uniform threshold iterated integer arithmetic
Statement
For explicitly listed nonnegative -bit integers, iterated sum and product have constant-depth polynomial-size uniform threshold-circuit families over AND, OR, NOT and MAJ. Their exact binary outputs need at most and bits, respectively. Addition is DLOGTIME-uniform and multiplication is logspace-uniform, each in the total input length, under the explicit bit-array convention: input bit has tuple address , dimensions are supplied to the uniformity machine, and power-of-two padding uses zero entries. Circuit gate addresses have a fixed number of binary coordinate fields. The claim concerns this explicit representation, rather than arbitrary effectively decodable encodings.
Facts & Assumptions
Given: and the explicit input array and uniformity conventions in the Statement.
DLOGTIME uniform iterated addition threshold circuits constructs exact iterated addition with DLOGTIME-uniform constant-depth polynomial-size threshold circuits in this array convention.
Logspace uniform iterated multiplication threshold circuits constructs exact iterated multiplication with logspace-uniform constant-depth polynomial-size threshold circuits in this array convention.
Proof
Each summand is at most , so their sum is at most . Each factor is less than , so their product is less than . Thus the stated widths suffice, including zero inputs and leading-zero padding.
Apply [F1] to the input bit array to obtain the sum circuit, with precisely the permitted sum output width and the declared DLOGTIME uniformity. Its construction permits arbitrary ; in particular the uniformity bound is logarithmic in the explicit array length even when the number of summands is large. Apply [F2] to the same array to obtain the product circuit, padded to bits, with the declared logspace uniformity. These suppliers use exactly the gate basis and representation required here. Together with step 1.1, they establish all the circuit and output claims.
Time normalization of classical basis queries
Statement
For an explicitly coded machine in the derived full classical basis profile, input of length , and external transition clock , there is a fixed finite-head index-only erased-index interpreter reproducing exact acceptance, rejection and timeout probabilities. Writing for source description length, its time and maximum physical work-access address are bounded by for absolute constants . In particular, logarithmic descriptions and each fixed polynomial clock have overhead, including clock construction. This is a time-only normalization; it does not preserve a smaller original source space bound and makes no general equivalence claim for clocks below input length.
Facts & Assumptions
Given: a valid explicit finite-table code , input of length and external clock . Put , , , , and .
Uniform clocked simulation of encoded probabilistic machines supplies the index-only finite-table parser, fixed physical head protocol, disjoint source-index regions, total fresh emitted-word bound, and the address representation with three neighboring cached block IDs per head. Its explicit construction also supplies the external-clock driver. We replace its unordered prefix/cell tries with the ordered structures proved below. Fresh erased endpoint words have the same total-length bound as ordinary jump indices.
Unbounded error time space counting model defines the derived basis profile with finitely many binary work tapes, native queries on a designated tape, charged query endpoints, and the distinct index-only target. Query reads the MSB-first address word in and flips the answer at using ; , indices above give zero, and reversed endpoints omit the query. The empty word represents zero. Every source local operation has fixed finite arity, and all finite head/tape counts and instruction widths are polynomially bounded in under the explicit complete-table code.
Proof
First construct and justify the only balancing procedure used below. An insertion-only AVL tree is a binary search tree with each node storing its key, two child pointers, a parent pointer, height, subtree size and optional OR aggregate. Set the height of an empty subtree to zero. Maintain that the two child heights differ by at most one. A tree of height has at least nodes, where , and . For this implies , since the minimum sizes are nondecreasing. Induction therefore gives , so . Consequently the invariant implies logarithmic root-to-node paths, without any distributional assumption on keys.
Search by the ordinary ordered comparisons. An absent key is inserted as a leaf at the null child where search ends. Retrace its ancestor path, recomputing height, subtree size, and OR aggregate from each node's two children and its own value. Until the first unbalanced ancestor, each subtree height increases by at most one; these metadata updates are required whether or not a rotation occurs. If no ancestor is unbalanced, the height invariant already holds. Otherwise let be the lowest unbalanced ancestor. Suppose its left height has become two greater than its right height; the opposite case is the left/right reflection. Let be its left child. The child cannot have equal child heights: if its new child heights were , one child would be unchanged at , so its old maximum child height would already have been and its own height would not have increased. Thus the new child heights of differ by one. If is left-heavy, write the heights of its left subtree, its right subtree and 's right subtree as . Rotate right at , making the root of this local subtree. Its right child is now , whose two child heights are , hence whose height is ; 's two child heights are both , hence its height is . Recompute the fields of the rotated nodes bottom-up, then continue the metadata updates above the repaired subtree. All local balances are valid. The old pre-insertion subtree at also had height , so this restores that old height.
In the remaining left-heavy case, is right-heavy. Let be 's right child. Write the heights of 's left subtree and 's right subtree as . The two child subtrees of have heights each at most , at least when nonempty as required by AVL balance, and maximum . Rotate left at , then right at , making the local root. Its left child now has child heights and at most differing by at most one, hence height ; its right child has the analogous heights and also height . The root has height , again the old pre-insertion height at . This also covers , where the relevant empty children have height zero. The right-heavy cases are exact reflections. Rotations preserve the in-order key sequence: the single rotation changes to , and the double rotation changes to . All nodes retain their stable identities, while a constant number of child/parent pointers change. After this first repair the subtree's old height is restored, so higher ancestors cannot acquire a new imbalance. Recompute height, size and OR first on the lower rotated nodes, then their new root, and then along the remaining ancestor path. Thus search and insertion use node operations, and maintain all stated fields. This proves the needed AVL result locally; no deletions will be used.
For each virtual binary work tape keep an outer insertion-only AVL tree whose keys are canonical numerical block prefixes in the representation , . Each outer node has a permanent compact block ID equal to its stable allocation ID. Store a canonical binary prefix word and its length at that node. To compare a freshly supplied prefix of length with a stored prefix, first compare their lengths, which are short integers. If unequal this decides numerical order; if equal compare their bits lexicographically. Each comparison costs elementary short-address/bit operations, including access to the stored key. Search/insertion makes such comparisons by step 1.1 and step 2.1 and step 3.1. Only head-jump or query-endpoint registration requires such a fresh-key search. As in [F1], on every registration also register if nonnegative and , whose canonical words can be formed by ordinary scans in work. The sum of all these key lengths is by fresh-index charging in [F1]; duplicate keys are not stored twice. This bounds all long-prefix reading and key comparison costs by . Initial prefix zero and its neighbor one add only fixed keys per virtual tape.
Every outer node owns an inner insertion-only AVL tree of all offsets so far accessed in that block. Its keys are -bit offsets; its node stores the current binary cell value. Keep nodes even when their value becomes zero, so deletion is unnecessary. The inner subtree OR is the OR of its nodes' cell values. The outer node's own OR is its inner root's OR, or zero for an empty inner tree; its subtree OR combines its own OR and the two outer child subtree ORs. A new cell is initially zero, and then receives any prescribed write. Each source local operation accesses only cells. A query will access at most individual cells in addition to its range-OR operation below. Hence the number of inner nodes is at most . Searching/inserting an offset costs comparisons of -bit keys. A bit-value change recomputes OR along its inner ancestor path and then along its owning outer node's ancestor path; rotations maintain the same aggregates by step 3.1. Thus one short-offset access/write costs physical work. Unregistered prefixes and absent offsets represent zero cells.
The parent pointers and subtree sizes allow numerical comparisons of already registered block IDs without rereading their possibly long keys. Compute the in-order rank of a known node as its left-subtree size plus one, then ascend to the root, adding one plus the ancestor's left-subtree size whenever the current node is that ancestor's right child. Every node visited contributes exactly the keys preceding that lie in the corresponding ancestor piece, so the result is the exact one-based numerical rank. This uses short-record operations by step 1.1. Stable node IDs and current parent/size fields remain valid after rotations. No insertion occurs while the ranks of one operation are being used. Two compact cell addresses are compared by these outer ranks and then their short offsets. Local head moves use the same three cached adjacent-prefix IDs as [F1]: between source jumps a head travels at most cells, so cannot leave those three blocks. In particular repeated crossings of a block boundary cost only short-offset arithmetic and cached-ID selection. They never incur another long-prefix comparison.
Prove the range-OR procedure explicitly. In an AVL tree whose nodes have in-order ranks, sizes and OR aggregates, the OR of a contiguous rank interval is obtainable in node visits. At a subtree, its root rank and child rank intervals are computed from a carried starting rank and the left size. If a subtree's whole rank interval is inside the query interval, use its stored aggregate; if disjoint, skip it; otherwise recurse on the intersecting children and include the root's own value if its rank is in the interval. At each depth only subtrees containing one of the two query boundaries can require recursion: at most two partially intersected subtrees, together with at most a constant number of their fully included/disjoint children. Thus total visits are . Inner offset trees use ordinary -bit key comparisons to locate offset bounds, with the same procedure or the corresponding two boundary paths. For a source address interval , if both endpoints have the same block ID, query that inner offset interval. If their block IDs differ, OR the suffix of the left inner tree, the prefix of the right inner tree, and the outer subtree range strictly between their numerical ranks. Registered endpoint prefixes exist by registration, even if their inner trees are empty. All untouched cells contribute zero. This computes exactly the OR of every source work bit in , including arbitrarily large gaps of unvisited zero cells, in work.
Realize the data structures in the index-only target by the fixed physical protocol in [F1]. Source index words occupy separate -cell reserved regions; arithmetic reservation does not scan them. Store the long prefix words in append-allocated arrays. Allocate each outer/inner node as a fixed-width binary record with short child/parent pointers, height/size, current bit or inner-root pointer, and OR fields. The outer-node count and total long-key length are ; the inner-node count is . All record lengths are , so the largest physical address is . Select a padded pointer width for a sufficiently large absolute ; the preceding bound is smaller than . Every pointer, height, size and low-offset arithmetic operand fits in polynomially many -bit fields. A constant number of fixed physical heads, reserved scratch regions, emitted short erased input/work indices and ordinary local scans implements each elementary node or array-bit operation in transitions, as in [F1]. No extra physical head per source head, arbitrary alphabet extension, unit-cost large-integer operation, or long uncharged address is used.
On a source basis query, consume and register the two fresh endpoint index words, with their neighboring prefixes, as in step 4.1. Save the answer bit at address . Starting from endpoint , take at most virtual predecessor steps, stopping at . Each predecessor uses only short-offset arithmetic and the cached three-prefix neighborhood of , because for ; when , and no predecessor step is needed. Record the encountered bits, in reverse order, to obtain the last address bits. Comparisons with use compact ranks/offsets from step 5.2, not long key strings. Let be the position reached, namely . Query range-OR on using step 6.1. If that OR is one, some address bit more significant than the last bits is nonzero, so the query address is at least and the answer must stay unchanged. If it is zero, the entire numerical input address is the recorded low word, padded with leading zeros to bits. Compare that short integer with and . Outside , leave the answer unchanged; inside this range, emit the physical input address for bit (subtract one, then add any fixed paired-input encoding offset) on the index-only target's ordinary input index tape, make the native classical input read, and XOR the retrieved input bit into the saved answer cell. In the empty-address case , the low word is zero and as specified. This exactly implements on all basis work configurations, while never invoking a block query in the target. The source address register can be reused indefinitely; each operation uses aggregates and short accesses rather than rescanning that register.
The charged long-prefix operations total by step 4.1. Each source transition additionally uses for finite-table lookup, short head updates, collisions, ordinary cell reads/writes, and at most one fixed finite number of basis queries. A basis query contributes at most short cell accesses, a constant number of rank/range-OR operations, and a short emitted input index, all bounded by the same type of polylogarithmic factor. Multiply by the short-record physical cost from step 6.2, add the input-length scan and polynomial code initialization, and enlarge the absolute exponent to obtain the theorem's bound. The same allocation bound proves the asserted time-scale maximum address. This is solely a time normalization; the dictionary need not respect a smaller original source space bound.
Use [F1]'s external-clock driver: test halting before expiry, consume one designated fresh fair bit for the next source table, save the complete source instructions, and apply their operations with the source's simultaneous-action and collision conventions. Ordinary source operations are exact by [F1] and the compact numerical address/value invariants; a source block query is exact by step 7.1. Induction reproduces the entire source basis configuration after each simulated transition. All added dictionary, balancing, rank, OR and input-read work is deterministic. Ignoring physical fair bits except the designated source choices therefore preserves every consumed source prefix's probability ; summing disjoint terminal prefixes preserves acceptance, rejection and timeout probabilities exactly. A halt on transition is reported, and nonhalting expiry rejects.
For descriptions of length and fixed polynomially bounded clocks , both and are polylogarithmic in , so step 8.1 gives time. A fixed deterministic clock constructor can first be simulated by the already proved index-only external-clock interpreter with doubling budgets, as in the combined clocked candidate, with total time . The resulting index-only target is included in the basis-query profile. Thus the time-hierarchy diagonal can use this normalized interpreter in the basis-query profile, and Cook-style trace encodings can use its bounded-address index-only computation. This does not identify sublinear-time basis-query and index-only classes, and transports no original source-space bound.
Logspace uniform near-linear Cook formula encoding
Statement
Use raw binary input pairs and the fixed-width clause encoding in the proof. For each fixed deterministic sequential multitape computation of worst-case time on , there is a formula of size , each encoded output bit generated in time and workspace with direct input-bit access. Its input-dependent constants form one ordered initial block, permitting sequential on-demand generation with the same polylogarithmic overhead per output-head transition. For fixed there is exactly one satisfying when the computation accepts, and none otherwise. The same conclusions hold for a fixed derived-basis machine when is at least its input length. Variable blocks and malformed-input behavior are fixed with the machine.
Facts & Assumptions
Given: a fixed deterministic machine, an integer time bound , and its finite transition table.
Effective binary encodings and total decoders fixes effectiveness; the proof specifies raw bit arrays and fixed-width clause slots explicitly rather than inferring resource bounds from an arbitrary decoder.
Uniform clocked simulation of encoded probabilistic machines supplies the sequential/index-only interpreters, and Time normalization of classical basis queries normalizes derived basis queries into an index-only computation with polynomially bounded physical addresses for clocks at least input length. The distinct profiles are defined in Unbounded error time space counting model.
Proof
Use the declared sequential multitape model, with its fixed finite alphabet, fixed number of heads, and heads initially at zero. Make halting states absorbing. In steps a head visits only positions , so each head address has bits. A candidate trace lists, for every time , its state, head addresses and scanned/written symbols, together with the final state and addresses. Constant-table transition checks, binary increment/decrement/clamping checks, the initial state/address checks and final acceptance check have bounded-fan-in circuits of total size . Each table lookup has constant size because the simulated machine is fixed.
For a fixed deterministic machine in the derived basis profile and , the deterministic instance of [F2] gives an exact index-only interpreter of time whose actually used physical addresses and index words have bits. The description is fixed and its fair-bit tables agree, so no probabilistic choices affect this computation. The interpreter's source input, code and clock have total length . Its explicit time bound can be rounded up to a fixed uniformly computable clock. No sublinear-space preservation is needed for this formula construction.
For every tape and time create an access record containing tape ID, address, time, read symbol and written symbol, copied by wires from the trace. A read-only access has equal read/write symbols. Include initial records at time for the at most relevant cells of the input tape, each with its actual input symbol as written symbol. Other tapes are initially blank. Use a validity bit and pad the records to a power of two by dummy records. Sort by (validity,tape,address,time), putting dummies last. Require each real record's read symbol to equal the preceding record's written symbol when the tape/address keys agree; at a first access to an address with no initial record require blank. Initial records need no read check. Thus the trace satisfies all these checks if and only if every reported read is the last symbol actually written to its addressed tape cell, or the correct initial symbol.
Here is the complete sorting construction used in step 2.1. Compare two -bit keys lexicographically using the first unequal bit, realized by a prefix equality chain and Boolean gates; select both output records with multiplexers. This costs gates. A bitonic merge of records compares pairs at distance , retaining smaller records in the first half and larger in the second, then recursively merges each half. To verify this, it suffices to consider Boolean keys: if sorting failed, applying a threshold between two inverted output keys commutes with every comparator and gives a Boolean failure. In a circular bitonic Boolean sequence the ones form one circular interval. The distance- comparisons therefore either remove all ones from the smaller half or all zeros from the larger half; both halves remain circular bitonic, and every smaller-half bit is at most every larger-half bit. Induction proves merge correctness. Sort two halves in opposite directions recursively, concatenate to form a bitonic sequence and merge. For padded records the merge uses comparisons and the sort uses comparisons. Here and record width , yielding Boolean gates.
Memory consistency and the transition checks determine the trace uniquely from the input: induction on time first determines the scanned symbols from the earlier writes, and then the fixed deterministic transition determines the state, writes and next head addresses. The true trace passes all checks exactly when the original computation accepts. All sorting and checking gates are deterministic functions of the candidate trace. Introduce one variable for each gate output and constant-size clauses enforcing that gate's truth table; require the final checking conjunction to be true. For each input there is therefore exactly one satisfying assignment of all trace/gate variables when it accepts and none when it rejects. The number of clauses is the circuit size, and explicit binary variable names increase formula encoding length by at most .
Fix the formula as the concatenation of fixed-width padded encodings of those local clauses. A gate has a tuple address consisting of module type, trace time or sorting round, wire number and bit/gate offset. Bitonic sorting pairs wire with in its round ; its direction is fixed by the relevant th bit of . In the recursive implementation this same tuple rule follows by the successive half merges described in step 3.1. Ripple comparisons and multiplexers have locally indexed predecessors. Thus one requested clause/variable-name bit is generated by operations on -bit counters, storing only a fixed number of such counters. Decoding fixed-width clause offsets is integer arithmetic on bits and costs polynomial time in even with school algorithms. Fix input-gate variables by unit clauses in one initial ordered block, with a common fixed clause-slot width and the clause for in slot . Only this block contains actual symbols; all other clauses refer to variable names. Unfixed symbols remain input variables. For isolated bit generation, the bit generator uses the declared direct access to the indicated input bit. For sequential consumers, a unit move of the formula-input head changes the required source-input position by at most one inside this block; outside it park the source head at the nearest endpoint. This monotone address map charges all source-head motion to formula-head motion plus initial setup, so sequential on-demand generation uses polynomial-logarithmic overhead per formula-input transition and workspace without uncharged random access. This proves logarithmic workspace and polylogarithmic output-bit time for the sequential construction; the separate derived-basis extension follows below.
Apply step 1.1 and step 2.1 and step 3.1 and step 4.1 and step 5.1 to a trace of this bounded-address interpreter, with one addition: each fixed native index tape is represented by its -bit accumulating value and length, updated by shift-and-append on an emitted bit and reset on use. A jump's next head address must equal that accumulated value. Head collisions and the source's suppressed-write rule are fixed local checks; records at equal time are sorted further by head label, and colliding heads have no intervening writes, so the adjacent-record memory test remains correct. All addresses, states, index prefixes and counters use bits, and the fixed number of heads contributes only a constant factor. The verifier and clauses consequently have size and the same local polylogarithmic-time/logspace generation. The deterministic interpreter has exactly one valid trace, so the unique-witness conclusion is unchanged. Input-dependent unit clauses remain in the ordered initial block. This establishes the claimed extension for the derived basis profile while retaining the sequential construction.
Counting time space to linear hierarchy
Statement
For constants and there is a finite integer such that for either fixed profile . The basis profile is the explicitly derived full-basis comparison, with native queries and charged operand endpoints.
Facts & Assumptions
Given: fixed constants , and a fixed source machine in one declared profile with the stated asymptotic time and space bounds.
Unbounded error time space counting model fixes both profiles, charged erased index emission and the strict machine threshold.
Uniform threshold iterated integer arithmetic supplies DLOGTIME-uniform addition and logspace-uniform multiplication, with explicit bit-array encodings.
Logspace predicates in a fixed linear counting hierarchy level puts the fixed logspace multiplication wiring predicate in a fixed level of either hierarchy.
Bounded-overhead tie normalization for fair-bit machines permits linear-overhead complement of strict-majority machines and relativizes to exact oracles.
Proof
Choose fixed rational and . Outside finitely many lengths, the source time and space are bounded by the computable integers and ; fixed machine constants are absorbed by these strict exponent margins. Decide the finitely many remaining strings by a hardwired finite table. Pad every random branch to the common clock , consuming suffix bits in its halted state without changing its outcome. Time-stamp configurations. In the basis profile, keep each unread write-only index only through its numeric prefix saturated at for any work-head or native-query endpoint target. Appending a bit cannot decrease an overflowing value, and such a value is never used on a true -space computation. For an input target saturate at ; an overflowing input jump stays beyond the input during every remaining local step, so a FAR marker returns blank until the next jump. Index tapes cannot read their emitted length or contents before use; leading zeroes and discarded overflow bits therefore have no other observable effect. Their reset returns the numeric prefix to zero. Current input positions up to and FAR markers use logarithmic length. The fixed number of indices contributes only bits. Their descriptions have bits and there are of them. The accepting probability is the sum of path counts from the initial configuration to all accepting clock- configurations divided by . The strict threshold is therefore comparison with .
Put . For a segment of length , split its time interval into consecutive intervals differing in length by at most one, sum over the checkpoint configurations, and multiply the corresponding segment path counts. Concatenation of the component paths bijects with the original paths, so this arithmetic identity counts each path exactly once, including parallel fair-bit edges. Each checkpoint tuple has bits. At each stage the sum fan-in is at most and each product fan-in is , polynomial in . After a fixed stages, segment lengths are bounded by a constant because the recurrence has bounded rounding sum. Count the constantly many bottom transitions directly by enumerating their constantly many bit strings. Sum the top counts over accepting endpoint configurations. This gives constant-depth arithmetic circuits of size . Every count and every padded input/output word needed in a fixed number of arithmetic substitutions has polynomially many bits.
Substitute the arithmetic circuits of [F2]. Addition subcircuits may have exponentially many polynomial-width operands: DLOGTIME uniformity in their own size decides their local wiring in time on -bit addresses. Multiplication subcircuits have only polynomial-width operands, so their own input size is polynomial in ; their logspace gate-address predicate uses space. By [F3] that predicate lies in a fixed sequential . Arithmetic-level checkpoint wiring and the bottom transition predicates are decidable in sequential time from the full labels and : each configuration has sublinear length. To check a native query transition, scan its work-address block, cap its numerical input index at n+1 and scan x at the indicated valid position; this costs O(S+n)=O(n). Only a constant number of transitions are checked at a bottom leaf. Thus the resulting constant-depth Boolean circuit has gates with -bit labels and a fixed- adjacency/type/input predicate. The exact output comparison with is an additional constant-depth Boolean layer: test the highest bit or the indicated lower bits lexicographically, using their known threshold word.
Evaluate these circuits by induction on their constant depth. Sample uniformly an -bit candidate predecessor label. For a strict-majority gate, a nonedge contributes an independent unbiased acceptance bit and an edge contributes the predecessor value. The acceptance probability is above half exactly when strictly more than half of the actual predecessors are true; neutral nonedges cancel exactly. For an ordinary at-least-half MAJ gate, instead use complemented predecessor values in this procedure, then apply [F4] and exchange the outcomes; this accepts exactly when at least half of actual predecessors are true. OR is existential truth of an adjacent true predecessor: branch 0 accepts unconditionally and branch 1 samples a label and accepts exactly on an adjacent true predecessor, giving strict majority exactly when such a label exists. For AND, form the analogous OR test for a false predecessor, apply [F4] to remove its possible tie when no such predecessor exists, and exchange the outcomes. NOT queries and inverts its unique predecessor. These formulas also give the correct empty AND/OR conventions if such gates occur. All oracle query strings and random choices have length; no rank-selected predecessor enumeration is assumed. Tagged unions of the adjacency and lower-depth predicates fit in the maximum of their fixed levels, since a lower-level machine can be padded by an unused query. Tie normalization relativizes because it treats every oracle answer as exact. Thus each depth adds only a fixed finite number of hierarchy levels.
The depth bound depends only on and the fixed arithmetic constructions. The multiplication adjacency predicate and its hierarchy level are fixed independently of the simulated machine; its transition table changes only the constants in deterministic linear-time local checks. Hence a fixed finite works for the class containment. Its output gate decides the strict acceptance threshold in step 1.1. This proves the containment.
Probabilistic polynomial time hierarchy
Statement
For rational with time-constructible polynomial bounds, is properly contained in in either one fixed declared access profile , with basis denoting the explicitly derived full-basis comparison model. The separation proof uses the explicit uniform interpreters Uniform clocked simulation of encoded probabilistic machines and Time normalization of classical basis queries.
Facts & Assumptions
Given: rational , the time-constructible polynomial bounds , and one fixed sequential or derived full-basis random-access profile.
Bounded-overhead tie normalization for fair-bit machines removes exact half-probability ties with additional time, then label-swapping complements the normalized language.
Effective binary encodings and total decoders fixes a total binary code and decoder for the machine descriptions used in the diagonal enumeration.
Uniform clocked simulation of encoded probabilistic machines supplies the sequential interpreter and Time normalization of classical basis queries supplies the derived-basis interpreter via an index-only target, with polynomial-clock overhead for -bit explicit transition-table descriptions. Use that explicit prefix-free code here, rather than an arbitrary effective decoder.
Time-constructible and space-constructible functions supplies the clock convention for the rational polynomial bounds.
Proof
Choose a rational with , so . On input of length , scan the input to determine , parse its initial self-delimiting code , and require for a fixed constant ; reject malformed or overlong descriptions. For a valid code, clock at transitions, treating timeout as rejection. Normalize ties by [F1] and swap accept/reject labels. The diagonal machine accepts with probability greater than exactly when the normalized clocked machine for has probability below . The explicit code and bounded parser are supplied by [F4], with effectiveness and clock conventions in [F2,F3]. The time- source computation has probability denominator dividing ; the selector of [F1] uses this source clock, while the interpreter merely implements its exact probability.
By [F4], the clocked simulation of every active -bit description uses time and preserves its fair-bit distribution. Reading the input length costs ; code initialization costs ; and the tie gadget costs . Since and , their total is . Thus the diagonal language belongs to by its polynomial-clock specialization.
If some fixed decided the diagonal language in time, take arbitrarily long strings beginning with its fixed code . For all sufficiently large such lengths, exceeds the running time of , so the clocked computation in step 1.1 is exactly 's computation. Tie normalization and label swapping then make the diagonal machine accept exactly on inputs where rejects, contradicting that decides the same language. Thus the diagonal language is not in . The reverse non-strict inclusion follows by running the faster machine unchanged under the larger time bound, so the containment is proper in the selected profile.
Tight majority formula completeness
Statement
For either fixed profile , every language reduces to MajSAT, and every language reduces to MajMajSAT, with output length n log^O(1)n and each output bit computable in log^O(1)n time and O(log n) space, in the explicit input/machine/formula encodings. Basis means the derived full-basis restriction; isolated output-bit generation has direct source-input bit access, and the reduction also admits sequential on-demand generation with polylogarithmic overhead per formula-head transition.
Facts & Assumptions
Given: one fixed sequential or derived-basis LCH profile, a fixed LCH₁ or LCH₂ machine, and its exact polynomially bounded fixed-length fair-bit strings. Use a time-constructible clock and include ignored suffix bits; a machine using no random bits is padded by one ignored bit.
Unbounded error time space counting model fixes strict machine majority and at-least-half formula majority; Bounded-overhead tie normalization for fair-bit machines preserves the strict decision and removes all ties with linear overhead.
Logspace uniform near-linear Cook formula encoding gives the unique-witness near-linear formula encoding in both profiles, with direct bit generation and ordered source-constant clauses for sequential on-demand generation.
The gap-count construction for the transcript predicate is proved in steps 1.2–1.3 by a fixed number of explicit path-count compositions.
Time normalization of classical basis queries gives a quasilinear index-only simulation for the fixed basis machines here. Mapping its short input indices to a subword of a transcript or paired input adds only polylogarithmic overhead. The sequential case uses the ordinary fixed-tape simulation.
Proof
For , first tie-normalize its machine by [F1], then fix a linear integer clock for the resulting machine. Let be its accepting count among the fair strings , including ignored suffixes. By [F4] its deterministic branch predicate has time: source choices read sequentially, and normalized short input indices map to the subword with charged offset arithmetic. Apply [F2], obtaining with exactly one per accepting and none per rejecting . Put and define . For fixed , the branch has satisfying assignments, while adds two exactly when accepts. Each block is therefore one above or below half, and the total is at least half exactly when . The source has no tie, so this is its strict-majority decision. This same gadget applies to a quasilinear clock whenever needed below, with quasilinear output length.
For , take its linear-time oracle machine and tie-normalize the first-level oracle decider. For query , let clock the chosen yes/no oracle machine, with ignored fair suffixes. A proposed answer is correct precisely when its tie-free yes/no machine has more than accepting strings. Then exactly one accepting string has exactly accepting strings lexicographically before it. Serialize all proposed queries, answers and witnesses with lengths and canonical zero padding; its length is because . On a record of length , put , where counts accepting strings before . Let indicate invalid syntax and indicate that the chosen witness path fails to accept. Then is nonnegative and is zero exactly when every answer has its unique rank witness. These are explicit differences of path counts: choose nondeterministically, assign zero gap to invalid padded indices, and use independent strings for products; expand . A fixed number of these sums/products also gives , positive exactly when . Deterministic syntax/witness tests give integer indicator counts; invalid syntax skips the remaining tests and sets . Normalize each fixed basis component by [F4] before using it on a query subword; it then has no native subinput query, and short-offset access costs only polylogarithmic time. These count constructions thus take time, with no nondeterministic choices during deterministic interpreter work. Choose one common quasilinear choice bound and require unused suffix bits zero on accepting paths, preserving counts among choice strings. A leading fair bit selects on branch zero and the complement of on branch one. There are accepting choice strings out of , so the transcript-validity language has a matching-profile quasilinear probabilistic decider. The original rank strings still have total linear length.
Normalize the original outer oracle machine by [F1] before this construction. Keep its original fixed-length fair-bit string separate from a guessed fixed-length transcript record , whose unused suffix is canonically zero. Simulate the original machine on using the proposed answers in , and record whether its queries match the listed queries and its final outcome accepts. Make a single final query to containing the record and this flag; extend to reject whenever the flag fails. There is exactly one correct answer/rank-witness record for each by step 1.2. Consequently exactly one gives a YES query when the original path accepts and none do when it rejects. The number of successful pairs is the original accepting-path count. No preservation of the acceptance probability after guessing is asserted; the next steps restore its threshold explicitly.
Let be the deterministic final query from step 2.1, padded to fixed length . Apply [F2] to its quasilinear-time computation using [F4] to obtain with exactly one satisfying extension for every pair . Apply the same unique-witness/majority gadget of step 1.1 with the quasilinear clock for on the variable input , retaining as free Boolean variables, to obtain whose inner at-least-half test is true exactly when . Form the outer matrix . Here is one outer padding bit; the inner block has a fixed length independent of the value of . All deterministic computations have quasilinear time in their input length in the selected profile, so [F2] gives total formula size , logarithmic workspace and the claimed bit-generation and sequential-streaming interfaces.
Fix the original fair string , and put , . Among outer assignments, the fallback is false at exactly one tuple, so assignments give a residual inner formula true on at least half of . Among assignments, has exactly one extension for each , and precisely one has if and only if the original path accepts. Its two choices of contribute two additional successful outer assignments. Thus each fixed- block contributes one below half on a rejecting original path and one above half on an accepting original path. Summing the equal-sized blocks makes outer at-least-half true exactly when at least half of the original fair strings accept; outer tie normalization in step 2.1 makes this the original strict-majority language.
Step 1.1 proves the first-level reduction, and step 1.2 and step 2.1 and step 3.1 and step 4.1 prove the second-level reduction in either fixed profile. All added blocks have length before the near-linear formula encoding, and only a fixed number of these encodings are composed. The explicit clause order of [F2] preserves the sequential streaming property; the direct-input bit generator has the claimed polylogarithmic time and logarithmic workspace. This proves both reductions.
Unbounded error counting time space alternative
Statement
For either fixed profile , every real and every , there is a constant such that at least one of the following holds: , or . The basis profile is the derived full-basis comparison model. Formula thresholds are at least-half and machine acceptance is strict majority.
Facts & Assumptions
Given: real , , one fixed profile, and the local majority-formula encodings.
Probabilistic polynomial time hierarchy gives proper containment for rational strictly separated time exponents in the selected profile.
Counting time space to linear hierarchy maps the selected profile's polynomial-time/sublinear-space machines to a fixed level of its linear counting hierarchy.
Tight majority formula completeness supplies near-linear reductions for both hierarchy levels, direct polylogarithmic-time/logspace bit generation, and sequential on-demand generation with the same per-transition overhead.
Unbounded error time space counting model fixes the two profiles and exact charged oracle access. The time-only normalization can carry an exact classical oracle by forwarding its completed query and using its deterministic answer; its dictionary invariants are independent of that answer. Query copying adds only polylogarithmic time per original query symbol, absorbed by the strict padding margins below.
Time normalization of classical basis queries normalizes time-bounded basis queries into an index-only computation when its clock is at least input length. This time-only use adds polylogarithmic overhead.
Bounded-space simulation of a generated input handles generated inputs while retaining work extent for a known polynomial bound on source work operands, using maintained range-OR trees. It is the space-preserving tool below; [F5] is not used to transport a sublinear space bound.
Proof
Choose rational and . Suppose has the stated time/space decider. For a language in , [F3] produces a formula of length . Its source decider work extent is eventually below a known power-of-two bound , because absorbs fixed constants and polylogs in . In the basis profile use [F6] to simulate both ordinary reads and native basis queries on this generated formula in time and space . In the sequential profile [F3]'s ordered source-constant block, or a logarithmic virtual-input-position counter, gives at most the same overhead for each local input move without changing work records. The strict margins and bound these resources by and . Hence .
Choose rational with , put , and choose rational . For any language, its self-delimited padded version at length has a linear-time decider. In the basis profile apply [F5] to the original fixed decider, then translate its short indices to the original-input portion of the actual padded word; the cost fits because . Sequential simulation is no slower. Apply step 1.1 to that padded language. On the original word, its resulting time/space decider sees a generated input of length . For the basis profile [F6] simulates this virtual padded input with a known work bound rounded to a power of two; its delimiter and zero bits have polylogarithmic-time/logspace generators. Time is and work extent . The sequential virtual-input simulation has the same bounds. Thus by [F2] for a fixed finite . Increase to at least two if necessary.
Choose rational constants and suppose has a fixed decider. Let the reduction in [F3] map an -bit input to a formula of length for some fixed , with the stated direct bit generator. If , supply this formula on demand using [F3]'s sequential streaming guarantee; the decider then takes time. If , the bit generator alone does not justify composition with a time-only decider that can issue long block queries. Choose a constructible clock and apply [F5] to the decider's fixed explicit code. The resulting exact index-only interpreter has time and physical work-access extent bounded by a constructible . Choose a power-of-two majorant with fixed large enough that . The normalized index-only interpreter is a special case of the basis machine's head-access operations, with no native block query left; apply [F6] to its run on the generated formula . The formula length, bit generator, clock and address majorant satisfy [F6]'s hypotheses, so the exact simulation takes time. Thus in either profile , with the strict exponent margin absorbing the reduction, normalization and generated-input overheads.
We prove the stronger induction assertion that for every there is a rational with . The base is . For the induction step, set and take any with the resulting decider of time , where and . Encode each padded query self-delimited, with its original query in a designated prefix and a zero suffix, to a length . This padded language is in : verify its format in time and run the decider on the logical input . For , first apply [F5] to the fixed decider on its actual -bit input using the constructible clock . The normalized interpreter's index-only input reads are redirected to the encoded substring, returning the original blank or zero answer for addresses outside that substring; offsetting and saturating the emitted input indices is charged within the normalization bound. Its run takes because . The sequential case reads the same encoded substring by local input moves within the same bound. Hence the padded language belongs to . The original linear-time oracle machine for makes queries whose total lengths are . For , use that machine directly on the logical input . For , apply [F5] to its fixed code with a constructible clock ; [F4] permits forwarding its exact completed oracle queries and answers. The resulting index-only simulation takes time. Use a self-delimited padded input with the length and available in a designated prefix. The padded-language machine checks that encoding in time; the index-only simulation redirects each logical input read to the encoded substring and returns the original blank/zero answer outside it. This offset handling is charged to the emitted input-index bits. Replace each query by its padded version of length . The sum of these query lengths is because the original query lengths and query count sum to . Padding counters and query writes have the same total bound, so the padded outer language is decided in time with oracle and hence lies in .
Apply the time decider from step 3.1 to that padded outer language, whose input is of length . In the basis profile its block queries may again use long address blocks, so normalize this decider with [F5] at the constructible clock . Its exact index-only interpreter has time and physical work-access extent bounded by a constructible . The bits of are generated from by the self-delimited prefix and zero-padding map in polylogarithmic time and logarithmic space; its padding length, the clocks, and the address majorants have polylog-time/logspace binary generators. Since is polynomial in , choose a constructible power-of-two address majorant and apply [F6] to simulate the normalized run on this generated input. The resulting time is . In the sequential profile, supply the same padded bits on demand to the sequential decider with at most polylogarithmic overhead per input transition. Choose rational strictly between and ; the strict margin absorbs all polylogarithmic factors. This proves the induction assertion with its needed margin for the next padding step.
Steps 2.1 and 4.1–5.1 give although . Both exponents are rational and strictly greater than or equal to one, so [F1] contradicts this containment. The two assumed deciders therefore cannot both exist. This proves the stated alternative in either fixed profile without converting a VMW time/space computation to a sequential one.
Historical profile
The separately named preprint-delimited profile is not identified with the final erased-index profile. An extension of this theorem to that distinct profile is not proved or used here.
The VMW F/H Alphabet Has an Algebraic Dense SU(2) Lift and a Fixed Base Net
Statement
Put , and . The alphabet is an inverse-closed subset of whose generated subgroup is dense, with algebraic coordinates admitting fixed minimal-polynomial and rational-isolating-interval descriptions. For every fixed rational , it has a fixed finite base-net certificate of radius as in Inverse-Closed Dense SU(2) Gate Set. Erasing scalar phases maps its letters respectively to and preserves word length.
Facts & Assumptions
Given: The four displayed exact matrices and a fixed rational .
Powers of a circle element with irrational angle are dense on the circle (Powers of an Irrational Rotation Are Dense on the Circle).
The closure of the subgroup containing two nonparallel Pauli-axis one-parameter subgroups is (Two Nonparallel One-Parameter Subgroups Generate SU(2) After Closure).
Inverse-Closed Dense SU(2) Gate Set specifies the required finite word certificate.
Fixed algebraic coordinates, sums, products and square roots can be enclosed by dyadic intervals to arbitrary precision, with polynomial bit cost (Fixed-Dimension Dyadic Matrix Routines Have Polynomial Bit Cost).
Proof
We have , , , and . Direct multiplication gives , , and , where and . The alphabet contains each adjoint. Its nonzero coordinate values are among and their imaginary multiples, hence have fixed square-free rational polynomial descriptions and isolating rational intervals.
The number is not a root of unity. Indeed, define integer monic polynomials , , and for . Then by induction. If , the rational number would be a root of the monic integer polynomial . A reduced rational root of a monic integer polynomial must have : multiply the equation by to its degree and reduce modulo any prime divisor of , which would force that prime to divide . This contradicts . Thus is not a root of unity either. Write ; then is irrational.
Here is a finite certificate whose existence does not require an accuracy-dependent search. Identify with the unit sphere in by . Direct multiplication gives , and therefore . Fix a positive dyadic mesh . Form all mesh points with , and normalize each to . Rounding the four coordinates of any unit vector to the nearest mesh point gives , , and . Thus the finitely many algebraic matrices form a -net.
By [F1], the closure of the powers of contains every -axis one-parameter rotation. Conjugating these powers by and using gives every -axis rotation in the closed generated subgroup. These axes are nonparallel, so [F2] makes that closure all of .
Density supplies, for each of these finitely many centers, a word in at distance less than . A finite word product has algebraic coordinates, so [F4] eventually certifies that its Frobenius distance to the center is less than : the strict operator-distance margin gives Frobenius distance less than . For each center, enumeration of words together with increasing certified precision therefore terminates. Fix the resulting finite word list, all its strict rational interval certificates, and its maximum word length. Every is within of a listed word, as required by [F3]. This preprocessing depends only on the fixed alphabet and fixed radius. Finally, replacing each by multiplies each letter by a scalar of modulus one; their product is one global scalar, so length and projective error are preserved.
Gray-code synthesis of a multiplexed Z rotation
Statement
For control bits and real angles , define If , this multiplexed rotation has an exact circuit with one-qubit gates and CNOTs; for it is one gate and no CNOT. The CNOT count includes the final parity-restoring CNOT.
Facts & Assumptions
Given: Ordered control and target wires, the exact convention above, and access to arbitrary one-qubit rotations and ordered CNOT gates.
Exact one-qubit gates and rotations defines as an exact one-qubit rotation.
The Pauli matrices gives and in the ordered qubit basis.
, , and gives for real .
CNOT and Control-Target Order maps a control-target basis pair to ; thus on a fixed control bit the target action is .
Finite circuit syntax and ordered wire labels fixes ordered wire supports and chronological gate lists; Denotational semantics of a finite layered circuit assigns their exact chronological matrix product.
Finite circuit resource accounting counts each declared gate occurrence once.
Proof
If , take the one-element mask list containing the empty string. If , construct the reflected Gray list recursively by and for . Induction shows that each -bit string occurs once, consecutive strings differ in one coordinate, and the last string differs from the first in one coordinate; hence for the cycle has single-coordinate transitions. For its masks set and . Then because the inner sum factors as , equal to for and otherwise.
Assume . Apply and follow the cyclic Gray list, placing one CNOT on the coordinate that changes between consecutive masks and one at each mask, including the CNOT that returns from the last mask to the first. There are exactly of each. On a fixed control word , the accumulated target bit flip before the th rotation is modulo two by [F5]. By [F2]–[F4], ; direct multiplication with [F3] gives . Conjugating the target rotation by that parity network therefore gives . The final CNOT restores the parity network, so the full branch operator is the product of these rotations.
Rotations about the same axis satisfy by multiplying their diagonal matrices. Thus on branch the target operation is by step 1.1. This proves the exact block action on every computational basis input and hence, by linearity, on every state. When , the definition is the single gate .
Basic Clifford T Rewrite
Definition
Input is a finite word of H,T,T†,CNOT gates with ordered wire labels. Fix the rules H²→ε, T⁸→ε, TT†→ε, T†T→ε, and CNOT²→ε, where ε means the empty subword; apply the cancellation rules only when the adjacent gates have the same ordered support. Scan left-to-right, choose the first match, delete the matched subword, restart the scan, and halt when no rule matches. Empty words are permitted. The output remains a word over the input gate alphabet and is locally irreducible for this displayed rule set; it makes no global-minimum claim.
The gate labels use the exact matrices and ordered supports fixed by Clifford+T gate library and exact matrices.
Circuit Resource Composition
Statement
For circuits placed on a declared common physical register, sequential composition adds gate counts and explicit depths; its width is the declared common-register width. Reusing workspace can make that width the maximum of the component widths only when the alignment and ancilla contracts permit reuse; otherwise all required wires remain allocated. Parallel composition on disjoint registers adds gate counts and widths and has depth equal to the maximum component depth. A clean ancilla is counted as clean only when the complete composed block returns it exactly to zero for every allowed data input.
Facts & Assumptions
Given: two circuits A and B embedded in one explicitly aligned physical wire register, and the intended QC09 conventions for syntax, matrix denotation and elementary resources.
Finite circuit syntax and ordered wire labels defines a finite ordered wire set, ordered gate supports, and finite chronological layers, with the first layer applied first. The current Definition body was inspected.
Denotational semantics of a finite layered circuit defines each layer's embedded-gate product and the chronological circuit product. The current Definition and its local proof were inspected.
Finite circuit resource accounting counts gate occurrences, explicit layers, and all wires including workspace. The current Definition body was inspected; width below means that declared wire count.
Tensor products of finitely many linear maps defines tensor maps by their action on elementary tensors. This is the exact interface used for the parallel tensor block.
A clean ancilla register starts in and is returned exactly to by the complete block on every data input (Clean and dirty ancillas).
Proof
Write for gate count, explicit depth and declared width. Once both blocks are embedded in the declared common physical register, concatenating their schedules uses each gate occurrence and each layer exactly once and in order, so and . The composite width is the common register's width. It equals only when the declared alignment reuses workspace; any wires that must remain allocated are included before taking that maximum.
In the parallel block on disjoint registers, the gate lists and wire sets are disjoint unions, so gate count and width add. Pairing the first layers, then the second layers, and so on, with empty layers on the shorter schedule, gives depth . On elementary product vectors, the combined circuit acts by the tensor map specified in [A4]; the circuit denotation follows from [A2]. Thus this schedule realizes the stated tensor product without adding operations.
By [F1], a wire is a clean ancilla of the composite block only if the complete composition returns it to zero for every allowed data input. Returning it after alone does not suffice when later changes it. Thus an internal wire may be counted clean only after the full block's return condition is checked.
Unoptimized recursive QSD decomposition and CNOT count
Statement
For every , the recursive cosine-sine/demultiplexing construction gives an exact no-ancilla circuit for any -qubit unitary. At each nonterminal level, split off the first wire as target and let the recursive children act on the remaining contiguous wire interval; the node uses four recursive -qubit unitaries, one multiplexed , and two multiplexed rotations, each with controls. If is the construction's CNOT count, then and This is the unoptimized recursive count; it does not include cross-block cancellations or terminal diagonal extraction and makes no compilation-time or finite-precision claim.
Facts & Assumptions
Given: Exact matrix semantics, arbitrary one-qubit rotations, CNOT gates, the cosine-sine block decomposition, and two-block demultiplexing.
Cosine-Sine Block Decomposition factors an even-dimensional unitary into two block-diagonal unitaries and a central block with nonnegative diagonal entries satisfying .
Demultiplexing a Two-Block Unitary factors each two-block unitary into two identical smaller unitaries surrounding a diagonal two-block factor .
Gray-Code Synthesis of a Multiplexed Axis Rotation exactly synthesizes a multiplexed with CNOTs for .
Gray-code synthesis of a multiplexed Z rotation exactly synthesizes a multiplexed with CNOTs for .
Exact Three-CNOT Synthesis of Two-Qubit Unitaries supplies an exact no-ancilla synthesis of every two-qubit unitary with at most three CNOTs and arbitrary one-qubit gates. Its direct matrix identity for the nonlocal two-qubit factor was inspected; this base case does not require expanding arbitrary one-qubit gates into a smaller primitive rotation alphabet.
is a bijection from onto the real unit circle supplies an angle for each nonnegative pair with .
Every nonzero complex number has a unique polar form with and gives a real argument for each unit complex diagonal entry of .
Finite circuit syntax and ordered wire labels fixes the ordered gate/layer syntax; Denotational semantics of a finite layered circuit gives the exact chronological matrix product; Finite circuit resource accounting counts CNOT occurrences.
Proof
Apply [F1] to a -dimensional unitary, splitting the first wire from the remaining contiguous wires. The central block acts on each select word by . By [F6], choose with and ; this block is the convention used by [F3]. Thus the central block is one -control multiplexed targeting the first wire.
Apply [F2] to each of the two block-diagonal factors from [F1]. Each factor becomes two -qubit unitaries on the remaining contiguous interval and one . For each computational select word , write the diagonal entry using [F7]. Its action on the first wire is , so this middle factor is one -control multiplexed . Therefore the recursive circuit has four -qubit calls and three multiplexed rotations in total. Their exact products compose as claimed by [F8].
At , [F5] gives . For , the four recursive calls contribute at most CNOTs. Each of the three -control multiplexed rotations contributes CNOTs by [F3] and [F4], giving .
The claimed closed bound equals at . If it holds at , then so induction proves the formula for every . No further gate cancellations are used.
Finite-Bit Compilation into the VMW F/H Alphabet
Statement
Fix a finite family of one-qubit unitary matrices whose first real and imaginary coordinate bits are computable in time polynomial in . For every rational , each matrix in this family can be compiled deterministically into a word over with The expanded word length, bit time including output, and workspace are polynomial in plus the binary encoding length of . Constants may depend on the fixed family. In particular, accuracy for fixed positive rational has polylogarithmic bit time, workspace and word length in . The output acts on the original qubit and allocates no additional quantum work space.
Facts & Assumptions
Given: The fixed finite gate family, its polynomial-time coordinate Cauchy procedures, and rational .
The VMW F/H Alphabet Has an Algebraic Dense SU(2) Lift and a Fixed Base Net supplies a fixed algebraic inverse-closed dense lift and fixed base-net certificate; phase erasure gives the physical alphabet.
Finite-Precision Bit Complexity of the SU(2) Solovay–Kitaev Compiler compiles an Cauchy target with a fixed algebraic gate package and base-net certificate in polynomial bit time, including the expanded output word, with polynomial word length.
Fixed-Dimension Dyadic Matrix Routines Have Polynomial Bit Cost supplies finite-bit sums, products, square roots and division with explicit conditioning bounds.
Proof
For each fixed , compute from its entries; . Choose once, as part of the finite machine description, one of the constants for which . Such a constant exists because at least one of is at least . On the half-plane , put and . Then , and by direct calculation. Fix one algebraic square root of and set . Thus and , so . All denominators in this normalization are bounded below by a fixed positive constant. By [F3], its coordinates have polynomial-time Cauchy procedures. There is no exact-zero test or accuracy-dependent branch selection.
Fix, for example, and the gate package furnished by [F1]. Apply [F2] to with tolerance . The fixed algebraic gate descriptions and base-net constants satisfy every gate-package hypothesis. The normalized target's Cauchy query exponent is a fixed constant by step 1.1. Thus the compiler prints a word in the lifted alphabet with , using polynomial bit time and polynomial expanded word length in the requested bit precision and tolerance-encoding length. Its work space is at most its bit time. This invocation uses the finite-bit theorem, not a unit-cost exact-real arithmetic count.
Erase scalar phases letter by letter using [F1]. The resulting physical word has the same length and differs from by one scalar of modulus one. Consequently its projective distance to is at most . Printing the physical labels adds linear time in the expanded output length. All quantum letters act on the same one-qubit register. At tolerance the requested precision and binary encoding length are , so every classical resource bound becomes ; a fixed family has one uniform maximum exponent and constant over its finitely many members.
Circuit Optimization Task
Definition
A circuit-optimization instance consists of (i) a finite circuit in the ordered syntax of Finite circuit syntax and ordered wire labels, with denotation given by Denotational semantics of a finite layered circuit, over one fixed finite exact gate alphabet, (ii) a declared equivalence relation—exact equality of those denoted matrices, or the whole-circuit phase relation from Global Phase Equivalence, and (iii) an ancilla policy and one applicable cost coordinate. The ancilla policy specifies the allowed initial ancilla states and exact return obligations under Clean and dirty ancillas. The cost coordinate is chosen from gate-occurrence count (size), minimum-layer depth, T-count, or width, using the precise meanings of Finite circuit resource accounting and Circuit-family and computation cost model. Here minimum-layer depth is from Circuit-family and computation cost model; T-count is the number of occurrences labeled or from Clifford+T gate library and exact matrices, so that coordinate is applicable only when the instance's alphabet contains those gates. The selected coordinate is part of the instance and remains fixed when comparing outputs.
Phase equivalence is applied only to the denotation of the whole standalone circuit. A phase on a unitary generally becomes a relative phase when that unitary is placed under control, so an optimizer may not silently replace a controlled subcircuit by a phase-equivalent one. The instance must specify controlled access explicitly when controls are present.
A feasible output is a circuit over the same gate alphabet and wire policy, with the same denotation under the chosen equivalence and no greater value of the selected cost coordinate. A globally optimal output has minimum selected cost among all feasible circuits in that declared model. This defines an optimization task; it supplies no algorithm or general optimality guarantee.
Ninefold nearest-neighbor multiplexor routing
Statement
For the unoptimized recursive QSD circuit, use the contiguous interval layout in which each multiplexed-rotation target is an endpoint, each recursive child acts on the remaining contiguous interval, and each two-qubit terminal block acts on adjacent wires. The line architecture permits both ordered orientations of adjacent CNOT. Replacing each length- CNOT in a multiplexor by the explicit line-neighbor network below uses at most nine times the original CNOT count. This is an architecture-specific gate-count bound; it asserts no depth bound or arbitrary-layout guarantee.
Facts & Assumptions
Given: ordered qubits, the contiguous recursive layout stated above, the cyclic reflected Gray-code multiplexor implementation, and both directed adjacent CNOT orientations.
Gray-Code Synthesis of a Multiplexed Axis Rotation gives an exact -control multiplexed-axis rotation using CNOTs; the final CNOT restores the parity network.
CNOT and Control-Target Order fixes and makes each CNOT self-inverse.
Unoptimized recursive QSD decomposition and CNOT count proves the exact recursive block structure and unoptimized CNOT recurrence. The separate optimized count is not used here.
Finite circuit syntax and ordered wire labels fixes ordered wire labels and chronological layers; Denotational semantics of a finite layered circuit fixes embedded-gate and circuit products; Finite circuit resource accounting counts gate occurrences and explicit layers. These current draft bodies were inspected. They provide the syntax, denotation, and cost conventions used to state the routing result; their presence is not independent approval.
Proof
Let be the number of controls and list them from nearest to farthest from the target. In a reflected Gray traversal, the nearest control is toggled at most times; the control at distance is toggled at most times. To see the bound, recursively form the reflected list and add the final edge returning the last word to the first: each non-farthest coordinate's toggle count is at most twice its count at the preceding recursion level, while the farthest coordinate changes at most twice (once at the join and once on return). The bound holds at and induction gives the displayed powers. Each toggle is one CNOT between the toggled control and the target. The total number of original CNOTs is by [F1].
For a CNOT whose endpoints are line edges apart, define to be the sequence of adjacent CNOTs along edges , followed by the reverse sequence on edges . It has gates. Starting from bits , the forward sweep makes wire hold . The reverse sweep, in descending order, restores wires to and leaves wire 1 as and wire as . Applying the same sequence a second time restores every intermediate wire and changes only wire , to . Thus is the required remote CNOT and uses adjacent CNOTs. For the opposite ordered orientation, reflect the wire labels in this construction; that reflection already reverses the physical orientation of each adjacent CNOT. Applying the same calculation to shows that the mirrored square restores every intermediate wire and changes only the left endpoint target, to . Both directed adjacent orientations are permitted, and the mirrored network also uses gates. The identities hold on every basis vector by [F2], hence as operators by linearity.
Leave every length-one CNOT unchanged and route each longer CNOT by step 2.1. Using the bounds in step 1.1, the routed count for one multiplexor is at most The original multiplexor has CNOTs by [F1], so the routed count is at most nine times its original count. By the contiguous recursive layout in [A1], every recursive block occupies a contiguous interval and each terminal two-qubit block is adjacent, so its CNOTs need no routing. Routing each multiplexor independently therefore preserves the factor-nine bound for the total CNOT count. This does not use any optimized QSD cancellation.
The local routing identity and count use the ordered-wire, chronological-denotation, and occurrence-count conventions in [A2]. The factor-nine estimate uses the locally stated unoptimized recurrence [A1]; the separate optimized terminal-count proof is not assumed.
Basic Rewrite Correct And Terminating
Statement
Each registered rewrite preserves the exact matrix; the procedure terminates and returns a local normal form relative only to the declared finite rewrite set. It is not claimed globally minimal.
Facts & Assumptions
Given: a gate word and the fixed finite rewrite list in the algorithm item.
Basic Clifford T Rewrite fixes the finite rewrite list and requires identical ordered supports for adjacent gate cancellations.
Clifford+T gate library and exact matrices gives , , , and on ordered wires.
Proof
By [F2], by direct matrix multiplication, , and . On ordered basis input , two consecutive same-support CNOTs send the target bit to , so . Tensoring each identity with the identity on unaffected wires proves that every rule in [F1] preserves the whole circuit matrix.
Each rewrite removes at least two gates and inserts none. Thus after at most half the input length many rewrites, the deterministic scan halts. At halt it has found no match, so the output is locally irreducible for the displayed rule list. This proves neither global minimality nor uniqueness of the local normal form.
Clean Ancilla Multicontrolled Tradeoff
Statement
For controls, reuse the exact no-workspace and one-clean-bit constructions from QC11, with total widths and and exact return of the clean bit. These compare construction upper bounds rather than optimal complexities.
Facts & Assumptions
Given: a controlled operation with controls and one target, exact elementary gates, and the stated clean-workspace convention.
Multicontrolled Unitaries with and without a Clean Work Bit proves the no-workspace and one-clean-bit construction bounds; its current proof body and exact borrowed-wire return argument were inspected.
Clean and dirty ancillas defines a clean ancilla as initialized to and returned exactly to by the complete block for every data input.
Finite circuit resource accounting defines width as the number of wires and size as the number of gate occurrences in the declared circuit.
Proof
The no-workspace construction in [A1] uses the controls and one target, so its width is by [F2]. Its one-qubit and CNOT gates are gate occurrences under the declared circuit-size coordinate [F2].
The one-clean-bit construction in [A1] adds one work bit, so its width is by [F2]. Its one-qubit and CNOT gates are gate occurrences [F2]. The compute/apply/uncompute sequence returns the bit to zero on every computational-basis input; because the overall operation is linear, the same identity holds on every superposition. By [F1] this is exactly the clean-ancilla return condition.
The two upper bounds use different widths and have no matching lower bounds in this item. They therefore establish construction bounds, not an optimality tradeoff.
Nearest Neighbor CNOT Overhead
Statement
For the unoptimized recursive QSD circuit in the contiguous interval layout—each multiplexor target is an endpoint, recursive children use the remaining contiguous interval, and terminal two-qubit blocks act on adjacent wires—with both directed orientations of adjacent CNOT allowed, the explicit line routing uses at most nine times the original CNOT count. This is an architecture-specific gate-count bound, not a depth bound or a guarantee for other layouts.
Facts & Assumptions
Given: the unoptimized recursive QSD block decomposition, the contiguous interval layout stated above, and both directed orientations of adjacent CNOT.
Ninefold nearest-neighbor multiplexor routing proves the factor-nine count for each multiplexed rotation and its sum over the recursive construction, using the actual QC09 circuit interfaces.
Proof
Apply the local routing construction in [F1] to every multiplexed rotation in the recursively emitted QSD circuit and leave its terminal adjacent two-qubit blocks unchanged. Since gate count is additive over this explicit sequential list, the total routed count is at most nine times the original count.
The construction specifies only CNOT occurrences on an ordered line. It gives no schedule or parallelization argument, so it implies no depth bound; it also says nothing about layouts without the stated line order.
QSD CNOT Upper Bound
Statement
Reuse QC11 exact QSD: no-ancilla -qubit needs at most CNOTs. Report one-qubit gates separately; a CNOT count alone is not total classical compilation time. Use for this formula; needs zero CNOT. For , an exact circuit exists only for the identity scalar , realized by the empty circuit.
Facts & Assumptions
Given: n ordered qubits and exact no-ancilla QSD as in QC11.
Exact QSD CNOT Upper Bound proves the exact no-ancilla CNOT formula, including its recursive central controlled- absorption identity and terminal diagonal-migration identity.
Proof
For , apply [A1] to the given unitary. Its exact no-ancilla QSD construction uses at most CNOTs. This is an upper bound for that construction, with both savings proved by the supplier, and makes no lower-bound or optimality assertion.
For , a one-qubit is itself an allowed one-qubit gate and uses zero CNOT; for , [A1] states that an exact empty-register circuit exists if and only if the scalar unitary is , realized by the empty circuit with no gates. The formula from [A1] is not used in these cases. One-qubit gates remain a separate resource, and no classical compilation-time bound follows.
Effective Exact Gate Factors for Fixed Local Unitaries
Statement
Fix a positive integer and a finite collection of fixed unitary matrices, each on between one and qubits. Suppose every real and imaginary matrix coordinate has a deterministic Cauchy procedure returning error at most in time polynomial in . There exist exact no-ancilla one-qubit/CNOT factor lists for all , with a common constant bound on their lengths, such that every coordinate of every one-qubit factor also has a polynomial-time Cauchy procedure. All scalar phases in the exact matrix products are retained.
The lists and Cauchy programs may depend on the fixed collection . In particular their finite zero/nonzero decisions and branch choices may be hardcoded. The claim is an existence statement for each fixed machine's finite transition set, not an algorithm that decides equality of arbitrary Cauchy-name inputs. It supplies effective target matrices for finite-precision compilation, not a compiler by itself.
Facts & Assumptions
Given: Fixed , a finite fixed transition set , and the coordinate Cauchy programs in the statement.
Fixed-Dimension Dyadic Matrix Routines Have Polynomial Bit Cost gives polynomial bit-cost fixed-dimensional sums, products, quotients with a supplied positive divisor lower bound, and nonnegative square roots, including zero. Rational rescaling extends its square-root range to any fixed bounded interval.
Exact Two-Level Elimination of a Unitary uses finitely many Givens row operations with when ; Correctness and Termination of Two-Level Elimination proves the exact resulting two-level/diagonal factorization, without discarding phases.
Gray-Path Synthesis of a Two-Level Gate implements a two-level block by fixed basis permutations, one pattern-controlled one-qubit block, and inverse permutations, including negative controls.
Multicontrolled Unitaries with and without a Clean Work Bit supplies the exact no-workspace square-root recursion for controlled one-qubit matrices. The borrowed-wire controlled- calls in that recursion have fixed elementary implementations.
Exact Controlled One-Qubit Unitary with Two CNOTs implements by three one-qubit target matrices , one control phase, and two CNOTs, using the stated Euler and half-angle formulas.
Complex spectral theorem: a normal endomorphism of a finite-dimensional complex inner product space has an orthonormal eigenbasis, and conversely gives orthogonal eigenspace projectors for each two-dimensional unitary.
Proof
Fixed finite compositions of polynomial-Cauchy scalars remain polynomial-Cauchy under the operations of [F1], provided each nonzero divisor has a fixed positive lower bound. There are only finitely many scalars in a fixed finite expression tree, so for its nonzero divisors some integer has throughout; may be hardcoded. A fixed zero is returned as zero. Nonnegative roots are allowed even at zero, and nested roots only multiply the requested precision by a fixed constant at each of finitely many levels. Thus the finite compositions still use polynomial time in . Conjugation merely changes an imaginary sign.
The path instruction in [F3] is an exact factorization. Each prescribed pattern-controlled exchanges precisely the adjacent path labels and fixes every other computational-basis label, because its controls must match the common bits. Let be the permutation effected by the swaps in their stated order. Then and . The middle block, with the stated block reversal when the target bit of is , acts by on the ordered pair and fixes its complement. The complete chronological list therefore has matrix , where is that middle block. Since is a permutation and maps to the selected pair, no other basis label maps into that pair; the conjugate acts by on and fixes every other basis vector. The controlled-gate expansions are exact by [F4] and [F5], and the negative-control conjugations retain their exact matrices. Thus every two-level factor used here is exactly the one specified by [F3], including its scalar phase.
A square root of any fixed polynomial-Cauchy unit scalar can also be selected polynomially. Choose a fixed with ; such a choice exists because the larger absolute coordinate of a unit complex number is at least . Put and , . Then and . Multiply by either fixed algebraic square root of and choose its fixed sign to obtain either desired root of . Step 1.1 applies with a positive constant denominator. Iterating gives any fixed finite tower of coherently chosen phase half-roots. A root of a fixed nonzero complex scalar is obtained by first normalizing and multiplying its unit root by ; the zero case is hardcoded separately.
For each , run the finite algebraic Givens construction [F2] as a mathematical factorization. Hardcode its actual finite skip decisions ; no run-time zero test on a varying Cauchy name is required. In each unskipped operation is a fixed constant, so all entries of that Givens matrix and the updated matrix are polynomial-Cauchy by step 1.1. There are at most operations, a constant. The terminal diagonal entries and the exact two-level adjoints therefore have polynomial-Cauchy entries. A phase on one chosen computational word is a pattern-controlled or on a selected wire, with the other wires matching that word; hence the terminal diagonal is a fixed finite product of pattern-controlled one-qubit matrices of the same effective class.
The square roots required by [F4] preserve this effective class. For a fixed two-dimensional unitary , if choose a unit root by step 2.1 and take . Otherwise the spectral theorem [F6] gives two distinct eigenvalues. The nonzero discriminant has a root as in step 2.1, and have modulus one. The projector and are orthogonal by [F6]. Choose unit roots and put . Then is unitary, , and every entry is polynomial-Cauchy by step 1.1 and step 2.1. The scalar/nonscalar branch and the positive eigenvalue-gap lower bound are fixed choices, not input-dependent equality decisions.
The constant one-control construction [F5] is effective as well. Choose a unit root of by step 2.1 and normalize . Write and , . If use for its phase, otherwise fix its arbitrary phase to ; treat the same way. Choose fixed real arguments with and , and choose with , . These are only notation: the algorithm never computes their real arguments. Every matrix entry of the Euler factors and of in [F5] is a finite sum or product of the unit phases and their coherently selected half-roots, together with , and . Indeed the latter are ; the z-rotation entries are exponentials of half-angles of and , hence phase roots from step 2.1. Choose their fixed signs to match these displayed arguments. Thus all four arbitrary one-qubit matrices in the exact controlled construction are polynomial-Cauchy; their multiplication retains the control phase exactly. No numerical angle oracle is assumed.
Apply the Gray-path implementation [F3] to each two-level block from step 2.2, and apply the no-workspace recursion [F4] to its pattern-controlled gates and to the diagonal phase gates. Negative controls and permutation gates have fixed algebraic entries. Each root step stays in the effective class by step 3.1 and each controlled base case does so by step 3.2. The number of controls, recursion depth, blocks, and elementary gates is bounded by a constant depending on and the finite fixed collection. Therefore only finitely many branch choices and divisor lower bounds are needed in total; hardcode them and the corresponding polynomial-Cauchy programs into the simulator. Exact factorization follows from step 1.2 and step 3.1 and step 3.2 and [F2]–[F5], including each scalar phase; the resulting gate factors and lengths have precisely the asserted properties.
BQTISP to Derived-Basis PrTISP Simulation
Statement
For sufficiently constructible , the published VMW model with charged operand extent satisfies The output uses the derived classical basis profile in Unbounded error time space counting model, with a fixed finite number of separate binary work tapes and native basis input queries. All work cells addressed by local operations or a query, including the highest query endpoint, count toward work extent. This is the explicit operand-space formalization of the published model; no general conversion to the erased-index head-access-only or sequential profile is asserted.
Facts & Assumptions
Given: the VMW quantum machine model and its bounded-error promise, with . The needed binary transition clock, space bound and precision indices have deterministic constructors in the matching profile within time and extent, and their construction is charged. No free scan of an input of length is assumed.
BQTISP Model fixes read-only input, classical and quantum work tapes, classically controlled local unitaries/measurements, coherent input queries, and the bounded-error thresholds.
Unbounded error time space counting model defines : fixed finitely many separate binary work tapes, erased sequential write-only index tapes for fresh head jumps and query endpoints, and native on a contiguous basis block of a specified work tape. Preparing every index is charged. The strict acceptance threshold and maximum addressed work extent include local operands and query endpoints. The index-only and preprint-delimited profiles are distinct.
Clifford+T gate library and exact matrices gives the exact ordered-basis matrices for and CNOT used in the path expansion below. The additional gate and its adjoint are defined explicitly in step 2.1.
Time-constructible and space-constructible functions gives the general clock-constructor convention. Here “sufficiently constructible” means specifically that the binary transition and resource clocks, compiler precision indices, and fixed padding-choice budgets can be obtained by deterministic routines within the displayed simulation time and extent in [F2]. Their work is included. This hypothesis does not identify a unary-input constructor with a free sublinear-time scan of the original input.
For a finite binary-branching nondeterministic computation, its accepting-path count is the number of accepting leaves. Below every such computation has an explicit transition and binary-choice bound. These are bounded path counts for arbitrary constructible ; the term #P is applicable only when the time bound is polynomial in input length. No #P membership is needed for the count algebra.
The operator norm is a norm on the space of bounded linear operators gives the triangle inequality for the operator norm.
The operator norm is submultiplicative and satisfies ||T^*T|| = ||T||^2 gives submultiplicativity of the operator norm; a unitary has norm one because it preserves vector norm.
Finite registers and their ordered computational bases makes each record qubit with its standard coordinate pairing and computational basis; the coordinate formula gives .
Ordered tensor registers, their inner product, and wire permutations defines the inner product of elementary tensor records as the product of their factor inner products. Distinct fixed-length two-qubit record strings differ in at least one coordinate, so their product-basis vectors are orthogonal by [F8].
Effective Exact Gate Factors for Fixed Local Unitaries supplies, for the fixed finite transition-gate family, exact constant-size decompositions into one-qubit gates and CNOTs with polynomial-time Cauchy procedures for each fixed one-qubit factor. It proves this effective interface without assuming a numerical QSD running-time bound.
The VMW F/H Alphabet Has an Algebraic Dense SU(2) Lift and a Fixed Base Net supplies an algebraic inverse-closed dense lift of and a certified fixed base net. Finite-Precision Bit Complexity of the SU(2) Solovay–Kitaev Compiler compiles an target given by a polynomial-time Cauchy name into this lifted alphabet with polynomial-in-precision bit time and expanded word length. Erasing letter phases gives the physical alphabet .
Fixed-Dimension Dyadic Matrix Routines Have Polynomial Bit Cost computes fixed-dimensional sums, products, square roots and quotients from polynomial-time Cauchy names, with polynomial bit cost under a supplied positive divisor lower bound. It also supplies polynomial-time approximations to fixed algebraic constants.
Proof
Detect source work-head collisions before decomposing a transition. The following classical marker construction stores positions without retaining their potentially long binary addresses. Fix a power-of-two stride , independent of , large enough for distinct tracks for source classical data, a marker for every source work head, an origin marker, compiler scratch, and a distinct parking track for every physical classical head. Logical cell on track is physical cell . For every source work head , keep one classical probe parked at and a single on marker track at logical position ; all other bits of that track are zero. Park the initially coincident physical heads at their distinct tracks using identity operations, then set the initial markers at logical zero. The origin track has its sole at zero and is never changed. To test , move probe within its current stride block to marker track , read its bit, and return to its parking track. Only that probe leaves its parking track during this test, so at the read no other classical head coincides with it. Transient collisions during movement perform identity operations only. Test all relevant pairs; there are only constantly many. Before a source movement clear each head's old marker using its own probe; then move the probes with their source heads and set their new markers before any further test. A local source move takes physical moves; probe the origin track to clamp a left move at logical zero. Duplicate each freshly emitted jump-address bit onto the probe's own erased index tape and append its fixed parking-label bits before use, obtaining without storing or rereading the address. Each source bit is duplicated only constantly many times. This maintains all markers exactly, costs constant time per source transition beyond charged index emission, uses fixed heads and alphabet, and has extent . Classical source symbols can likewise be read one probe at a time on the shared data track, saved in finite control, and written sequentially after evaluating the source's fixed classical function; the equality partition determines precisely whether that source operation is omitted. Auxiliary heads remain on distinct tracks, so source collisions do not suppress compiler or marker work. Apply the quantum source's collision-omission rule to the same equality partition: an omitted unitary is replaced by the empty word, not by its elementary factors. Otherwise its operands are distinct and are held fixed throughout its compiled block. The original quantum tape and its query blocks are not interleaved.
Each fixed one-qubit factor from [A1] has a polynomial-time Cauchy normalization into . Put , so , and hardcode with ; one exists since the larger absolute coordinate of is at least . Set and . Then , and . Fix an algebraic square root of and put . Thus , and . The formulas use only [A3] with fixed positive denominator bounds, so every coordinate of has a polynomial-time Cauchy procedure. There are finitely many factors; their branch constants and one common polynomial query bound may be hardcoded. No exact coordinate digits or run-time equality tests are needed.
For a fixed machine, only finitely many local transition unitaries occur, each on a fixed number of qubits. For every nonomitted unitary in step 1.1, decompose it into a constant number of one-qubit gates and CNOTs using [A1], with polynomial-time Cauchy names for the resulting fixed one-qubit factors. Choose fixed integers so that is the transition clock and bounds the one-qubit factors per transition. Fix and its base-net certificate from [A2]. Apply the bit-complexity theorem in [A2] to each normalized target of step 1.2 with rational tolerance . Its target-name, algebraic gate-package, inverse-closure and base-net hypotheses are satisfied. Erase the lifted word's scalar letter phases using [A2]; since , this compiles each factor to projective error at most over , its adjoint, and . CNOT and query gates remain exact. Direct multiplication gives because ; [F3] gives unitary and CNOT, and [F1] gives the query basis permutation. The finite-bit compiler has word length and bit time polynomial in , since the normalized Cauchy procedures have a fixed polynomial query bound and the tolerance has encoding length; workspace is at most bit time. Execute its deterministic work sequentially while holding the original quantum operand heads stationary. Preserve the source's classical transition, fresh index-bit emissions and scheduled jumps/queries once; extra compiler cycles neither duplicate nor consume its pending index words. Use the interleaved classical data, probes and scratch tracks of step 1.1, keeping a snapshot of the source input/classical scanned symbols from the beginning of its transition. Fixed extra classical heads access the compiler scratch track sequentially, whose used length is ; the resulting classical extent is . The original quantum work tape, operand positions and quantum-query endpoint indices are unchanged, so every native quantum-query block remains contiguous as in [F1]. The constructible bounds [F4] clock these loops, giving compiled time and work extent .
For a computational-basis measurement [F1], put for ; direct calculation gives , , , and . Postpone it in a proof-only deferred-measurement dilation by reserving a fresh two-qubit record slot, initialized to , at each of the transition times and using the isometry . The output branches are orthogonal by [F8]–[F9], and their squared norms sum to by the projector identities just checked. A transition with no measurement leaves that slot at . Thus every complete history has a fixed-length record string over the slots; distinct histories differ in some slot, so [F8]–[F9] make their record subspaces orthogonal, and subsequent classically controlled operations preserve orthogonality by [F1]. These record slots are not allocated by the simulator. A collision-omitted unitary has no compiled factors and zero approximation error. Projective compilation may multiply a one-qubit gate by a phase. Within each fixed history and transition time , all one-qubit factors act on the same quantum state, so their phases multiply to one scalar on that whole transition block. Rephase each compiled block by this scalar; telescoping its at most one-qubit replacements gives operator error at most , since surrounding gates and exact measurement dilations have norm one. The direct sum over orthogonal history blocks has this same bound: for and block errors , . Across the full computation, the actual and rephased compiled final vectors differ by , where is the product of the phase factors along history and . The accepting projection is block diagonal, , so . Thus the rephasing does not change acceptance probability. Telescope the phase-aligned transition products. Their exact and compiled prefixes and suffixes are norm one, so [F6]–[F7] give state-vector error at most . For unit vectors and accepting projection , . Cauchy–Schwarz [F10] and bound the absolute difference by . The compiled machine therefore accepts YES inputs with probability at least and NO inputs with probability at most .
Fix one input and the compiled computation. For a complete measurement history , let and count its and gates. Let be the final basis configurations accepted by the fixed machine after history , as determined by its finite transition table and terminal acceptance rule. Use the exact matrices from [F3] and the stated matrix in step 2.1. Expand every entry with numerator as five unit terms over denominator , and every numerator (respectively ) as three terms of phase and four terms of phase (respectively ). Each Hadamard transition contributes phase or over denominator ; CNOT, query, and computational-basis measurement transitions contribute or . Thus each path term has phase and denominator . For a final basis state , let count path terms of phase . Its amplitude is . Summing squared magnitudes over the accepting configurations gives the joint probability of history and acceptance: The identity follows by expanding the squared real and imaginary parts, and summing over histories gives the compiled acceptance probability.
Pad every branch to exactly quantum gate slots with identities, and set and . Multiply each joint accepting-history numerator in step 3.2 by . A bounded nondeterministic machine simulates two path terms in lockstep, requires the same measurement history and final basis row, tests shared classical acceptance, and counts pairs with equal phases positively and opposite phases negatively. The scale factor is exactly realized by extra binary choices and two five-way choices per missing slot, rejecting invalid encodings. All phase and scale choices use binary choices. At a measurement, guess one bit, require both basis rows to have it at the measured cell, feed it to their shared classical controller, then discard it. This sums histories without storing a transcript.
Store the two quantum basis rows on two separate binary work tapes and the shared classical configuration on separate fixed tapes, as permitted by [F2]. Corresponding heads on both rows make the same source local moves or fresh jumps; duplicate each newly emitted source index bit to the fixed number of required index tapes, so total address writing is multiplied only by a constant. Separate rows preserve contiguity of each query address block. For on source cells , apply native to each row using copies of its freshly written endpoint indices. Its address bits are unchanged and only its answer cell is updated. Duplicate the right-endpoint stream also to auxiliary heads on both rows; at query time place these at to read the old and new answer bits. These heads remain within charged operand extent . There is no copying or scanning of the possibly long address block, and no assertion that . Each row can read a different input bit, exactly as required by its distinct basis path. Maintain a counter of positions where the two rows disagree. It starts zero; every local gate or query changes only a fixed number of bits, so mirrored operand heads supply the before/after disagreement indicators and update . Since at most bit changes occur, uses bits; its final value is zero exactly when the rows agree, avoiding an terminal scan. Each counter operation costs bit time. Thus the two bounded path-count machines have time and extent , with accepting counts satisfying .
The sign of decides whether the compiled acceptance probability is above or below . The denominator is itself a bounded path count: guess bits and, for each of factors, two three-bit numbers, accepting only values below . Thus has exactly accepting branches and is generated in time and work space. Build bounded nondeterministic machines with path counts and by disjointly tagging the component computations and rejecting noncanonical padding. Pad both to the same total number of paths for an explicitly bounded , using zero-only suffix padding to preserve each accepting-path count. A fair leading bit chooses the machine on branch 0 and the complement of the machine on branch 1. The resulting machine has equiprobable paths and accepting paths, so it accepts with probability strictly greater than exactly when . The constructible bounds in [F4] let the simulator choose and exhaust these fixed choice lengths. All choice counters can be maintained in bits and time per choice. The total time is and work extent is in the derived basis profile.
Step 3.1 places compiled YES acceptance strictly above and NO acceptance strictly below . Step 6.1 preserves that sign, giving the stated bounded-error quantum to unbounded-error classical inclusion with its full claimed resources in . The classical operand-space convention is explicit in [F1]–[F2]; literal head-only accounting with uncharged distant query operands is not claimed. No general simulation into the index-only erased-address or sequential profile has been proved here.
Generic Circuit Count Lower Bound
Statement
Fix a nonempty finite gate alphabet of gates, each of arity at most with , and count circuits on classical input wires with zero-initialized ancillas and one designated measured output bit. No additional classical acceptance predicate is free. For a gate budget , put . After deleting unused ancillas, every such circuit has at most wires, and there are at most output-designated gate-list descriptions. Each description computes at most one Boolean function with success probability at least on every input. Hence, for all sufficiently large , at least of Boolean functions on bits require gates. If arbitrary classical postprocessing is allowed, its circuit or description cost must be included; otherwise this conclusion need not hold.
Facts & Assumptions
Given: A fixed finite gate alphabet with gates and maximum arity , classical input wires, zero-initialized ancillas, and one designated measured output bit. Count circuits with at most gate occurrences, where ; delete unused ancillas, retaining the output wire, so at most wires remain. The acceptance event is that measured bit being , with no free classical postprocessing.
Finite circuit syntax and ordered wire labels gives finite ordered gate supports and chronological layers; Denotational semantics of a finite layered circuit gives the exact product denotation of those layers. Their current draft bodies were inspected. A layered circuit can therefore be serialized in its stated order with the same denotation.
Quantum acceptance probability for a finite promise computation defines as the probability of the designated accepting output event for the circuit and input.
BQP for promise problems in the fixed QC14 model uses acceptance at least on YES inputs and at most on NO inputs.
Finite circuit resource accounting defines circuit size as the number of gate occurrences and width as the number of all wires, including workspace.
Proof
By [F3], gate budget counts gate occurrences and includes every workspace wire. A circuit with gate occurrences has at most ordered gate-list descriptions on wire labels: there are gate types and at most ordered supports per type. By [A1], flattening each finite layer list in chronological order preserves its denotation, so every layered circuit of at most gates is represented by one of these lists. Choosing the designated output wire contributes a factor at most . Thus the number of descriptions is at most . Since , , , and is fixed, for positive and . The sum is at most , whose logarithm is . Duplicate denotations only reduce the number of computed functions.
By [F1], a fixed description has one acceptance probability at each input. If it computed two distinct Boolean functions with success threshold [F2], some input would require the same number to be both at least and at most , which is impossible. Therefore one description accounts for at most one truth table.
There are exactly Boolean functions on bits. For , the bound in step 1.1 has base-two logarithm at most for a constant depending only on the fixed alphabet and arity. Since , choose so that this logarithm is at most for all sufficiently large . Then the fraction with at most gates is at most eventually. By step 1.2, each description covers at most one function, so at least require more than gates. This is an almost-all lower bound, not a lower bound for each named function.
The model in the statement charges the measured output-bit event and includes no free classical postprocessing, so the one-description/one-function count applies as stated. If a classical postprocessing circuit is admitted, it must be included in the finite description and gate count before this argument can be reused.
Counting Hierarchy Time Space Lower Bound
Statement
In the final published VMW erased-index quantum model, for every real and there exists such that either has no bounded-error algorithm of time , or has no bounded-error algorithm using both time and space . Consequently, for every , has no bounded-error algorithm with time and space . The fixed gates have the polynomial-time precision approximation condition of the model definition.
Facts & Assumptions
Given: the published VMW quantum profile and derived full-basis classical comparison, the at-least-half majority-formula conventions, and the stated resource bounds.
BQTISP to Derived-Basis PrTISP Simulation maps a bounded-error quantum computation of time and space to a matching-profile strict-majority classical computation of time and space .
Unbounded error counting time space alternative gives the direct classical alternative in the derived full-basis profile.
Unbounded error time space counting model defines the derived basis, erased-index-only, sequential and historical profiles, and the common plain-formula encoding.
Proof
Fix and choose rational and rational . By [F2] there is a classical time exponent for the alternative with parameters . Choose rational and suppose, for contradiction, that both quantum algorithms in the statement exist. For the time-only algorithm, choose rational with and use the constructible simulation clock . The published VMW model permits maximum work addresses exponential in the running time: in transitions only address bits can be emitted, so a constructible space majorant , for a fixed sufficiently large , bounds every work operand and query endpoint of this fixed machine. Its binary numeral is a followed by zeroes and is generated in time, within the required constructibility bounds. Both , so [F1] gives a matching-profile classical time decider. For the algorithm, choose rational with and use constructible majorants and . They are at least for large and dominate the assumed time and space . Theorem [F1] then gives classical time and space . These two classical algorithms contradict both sides of [F2]'s alternative.
Suppose has time and space . By [F3], a plain encoding is already the identical bit string accepted as a instance with an implicit fresh unused outer variable. Both of its outer assignments have the original inner majority value. First validate the plain encoding in time and workspace, rejecting malformed or partition-tagged inputs. On a valid plain input, reset that scratch and run the assumed quantum algorithm on the identical bit string, with exactly the same coherent input oracle and bounded error. Total time remains and space is ; no coherent virtual-input compilation is required. Choose and any fixed . These resources meet and . The original algorithm also meets for every fixed , contradicting the disjunction of step 1.1 with parameters . This proves the corollary.
Historical profile
The 2007 preprint's nonerasing delimited-head model is retained separately in the definitions. No equivalence with the final published model, and no extension of this theorem to that distinct profile, is asserted by this proof.
5 · Examples, counterexamples and false statements
None yet.
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